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authorOri Bernstein <ori@eigenstate.org>2016-12-04 22:30:45 -0800
committerOri Bernstein <ori@eigenstate.org>2016-12-19 01:58:05 -0800
commitf5db4655fcb8ef9c0fe034490692544f70b48ce5 (patch)
tree89346b3cf8b8eebe63409d8ea2ff5686e139aa7f
download6as-f5db4655fcb8ef9c0fe034490692544f70b48ce5.tar.gz
Initial commit.
-rw-r--r--bld.proj19
-rw-r--r--emit.myr13
-rw-r--r--gen.awk116
-rw-r--r--gen.py163
-rw-r--r--genregs.awk61
-rwxr-xr-xgenregs.sh3
-rwxr-xr-xgentables.sh6
-rw-r--r--insns.dat5324
-rw-r--r--main.myr26
-rw-r--r--parse.myr303
-rw-r--r--regs.dat138
-rw-r--r--types.myr103
12 files changed, 6275 insertions, 0 deletions
diff --git a/bld.proj b/bld.proj
new file mode 100644
index 0000000..832cda0
--- /dev/null
+++ b/bld.proj
@@ -0,0 +1,19 @@
+bin 6as =
+ main.myr
+ types.myr
+ parse.myr
+ emit.myr
+ encode.myr
+
+ # generated sources
+ tables-gen.myr
+ regs-gen.myr
+;;
+
+gen tables-gen.myr {dep=gentables.sh,dep=gen.awk,dep=insns.dat}=
+ ./gentables.sh insns.dat
+;;
+
+gen regs-gen.myr {dep=genregs.sh,dep=genregs.awk,dep=regs.dat}=
+ ./genregs.sh regs.dat
+;;
diff --git a/emit.myr b/emit.myr
new file mode 100644
index 0000000..6bef5e9
--- /dev/null
+++ b/emit.myr
@@ -0,0 +1,13 @@
+use std
+use "types"
+
+pkg assem =
+ const ble : (a : assem# -> void)
+;;
+
+const ble = {a
+ std.put("assembling\n")
+ for (name, sym) in std.byhtkeyvals(a.syms)
+ std.put("sym {}\n", name)
+ ;;
+}
diff --git a/gen.awk b/gen.awk
new file mode 100644
index 0000000..816b0c7
--- /dev/null
+++ b/gen.awk
@@ -0,0 +1,116 @@
+BEGIN {
+ FS="\t*";
+ nop=0;
+ nvar=0;
+}
+
+/^[ ]*;/ {next}
+NF != 4 {next}
+$2 == "ignore" &&
+$3 == "ignore" &&
+$4 == "ignore" {next}
+
+{
+ flags = "0"
+ split($4, f, ",")
+ for (i in f) {
+ if ((cur = getflag(f[i])) == "")
+ continue
+ flags = flags "|" cur
+ }
+
+ gsub(/:/, " | Argflagcolon,", $2)
+ split($2, a, ",")
+ for (i in a) {
+ if (a[i] == "void")
+ continue;
+ gsub(/\|[ \t]*near/, " | Argflagnear", a[i])
+ gsub(/\|[ \t]*far/, " | Argflagfar", a[i])
+ gsub(/\|[ \t]*to/, " | Argflagto", a[i])
+ gsub(/\|[ \t]*short/, " | Argflagshort", a[i])
+
+ gsub(/^mem_offs$/, "memoff", a[i])
+ args = "Arg" a[i] ","
+ }
+
+ if (!opvarstart[$1]) {
+ opvarstart[$1]=nvar;
+ opvarnames[nop]=$1
+ nop++
+ }
+ opvarcount[$1]++
+
+ vargs[nvar] = args
+ vbytes[nvar] = $3;
+ vflags[nvar] = flags;
+ vargs[nvar] = args
+ nvar++
+}
+
+END {
+ print "use std"
+ print "use \"types\""
+ print ""
+ print "pkg assem ="
+ print "\tconst instrtab : insn[" nop "]"
+ print ";;"
+ print ""
+
+ print "const instrtab = ["
+ for (i = 0; i < nop; i++) {
+ n = opvarnames[i]
+ start = opvarstart[n]
+ end = start + opvarcount[n]
+ printf("\t[.name=\"%s\",.vlist=varianttab[%s:%s]],\n", tolower(n), start, end)
+ }
+ print "]"
+
+ print "const varianttab = ["
+ for (i = 0; i < nvar; i++) {
+ print "\t["
+ printf "\t\t.bytes = \"%s\",\n", vbytes[i]
+ if (vflags[i])
+ printf "\t\t.flags = %s,\n", vflags[i]
+ printf("\t\t.args = [%s][:],\n", vargs[i])
+ print "\t],"
+ }
+ print "]"
+}
+
+function getflag(s, out)
+{
+ if (s == "8086")
+ out = "Bits16"
+ else if (s == "186")
+ out = "Bits16"
+ else if (s == "286")
+ out = "Bits16"
+ else if (s == "386")
+ out = "Bits32"
+ else if (s == "486")
+ out = "Bits32"
+ else if (s == "PENT")
+ out = "Bits32"
+ else if (s == "P6")
+ out = "Bits32"
+ else if (s == "KATMAI")
+ out = "Bits32"
+ else if (s == "WILLAMETTE")
+ out = "Bits32"
+ else if (s == "PRESCOTT")
+ out = "Bits32"
+ else if (s == "X86_64")
+ out = "Bits64"
+ else if (s == "NEHALEM")
+ out = "Bits64"
+ else if (s == "WESTMERE")
+ out = "Bits64"
+ else if (s == "SANDYBRIDGE")
+ out = "Bits64"
+ else if (s == "AMD")
+ out = "Bits32"
+ else
+ out = ""
+
+ return out
+}
diff --git a/gen.py b/gen.py
new file mode 100644
index 0000000..9eab2f9
--- /dev/null
+++ b/gen.py
@@ -0,0 +1,163 @@
+import argparse
+import collections
+
+variants = {} # mnem => variant list
+
+class Insn:
+ def __init__(self, name, cstr, code, flag):
+ self.name = name
+ self.cstr = cstr
+ self.code = code
+ self.flag = flag
+
+class Code:
+ def __init__(self, codestr):
+ self.codestr = self.parse(codestr)
+
+ def parse(self, codestr):
+ return codestr
+
+def iscomment(ln):
+ ln = ln.strip()
+ return not ln or ln.startswith(';')
+
+def parseword(ln):
+ ln = ln.lstrip()
+ for (idx, c) in enumerate(ln):
+ if c.isspace():
+ return ln[idx:], ln[:idx].lower()
+ raise Exception('missing instruction name on {}'.format(ln))
+
+def parsecstr(ln):
+ ln, allcstr = parseword(ln)
+
+ cstr = set()
+ for w in allcstr.split(','):
+ cstr.add(w)
+ return ln, cstr
+
+def parsecode(oln):
+ ln = oln.lstrip()
+
+ if ln.startswith('ignore'):
+ return ln[len('ignore'):], None
+
+ if not ln.startswith('['):
+ raise Exception('expected [ in code description near {}'.format(ln))
+ end = ln.index(']')
+ return ln[end:], ln[:end]
+
+def parseflag(ln):
+ ln, allcstr = parseword(ln)
+
+ flag = set()
+ for w in allcstr.split(','):
+ flag.add(w)
+ return ln, flag
+
+def parse(ln):
+ ln, name = parseword(ln)
+ ln, cstr = parsecstr(ln)
+ ln, code = parsecode(ln)
+ ln, flag = parseflag(ln)
+
+ return Insn(name, cstr, code, flag)
+
+def gentype(pkg, insntab):
+ o = open('gentypes.myr', 'w')
+
+ o.write('use std\n')
+ o.write('\n')
+
+ o.write('pkg {} =\n'.format(pkg))
+ o.write('\ttype insnop = union\n')
+ for (name, variants) in insntab.iteritems():
+ o.write('\t\t`I{}\n'.format(name))
+ o.write('\n')
+ o.write('\t;;\n')
+ o.write('\tconst insnop : (name : byte[:] -> std.option(insnop))\n')
+ o.write(';;\n')
+ o.write('\n')
+
+ o.write('const insnstrtab = [\n')
+ for name in sorted(insntab.iterkeys()):
+ o.write('\t\t"{}",\n'.format(name, name))
+ o.write(']\n')
+ o.write('\n')
+ o.write('const insnoptab = [\n')
+ for name in sorted(insntab.iterkeys()):
+ o.write('\t\t`I{},\n'.format(name, name))
+ o.write(']\n')
+ o.write('\n')
+
+
+ o.write('const insnop = {name\n')
+ o.write('\tmatch std.bsearch(insnstrtab[:], name, std.strcmp)\n')
+ o.write('\t| `std.Some i:\t-> `std.Some insnoptab[i]\n')
+ o.write('\t| `std.None:\t-> `std.None\n')
+ o.write('\t;;\n')
+ o.write('}\n')
+ o.close()
+
+def genemitter(o, name, variants):
+ o.write('const emit_{} = {{a, args\n'.format(name))
+ o.write('\tstd.put("emit {} {{}}\\n", args)\n'.format(name))
+ o.write('}\n')
+
+def genemit(pkg, insntab):
+ o = open('genemit.myr', 'w')
+ # header
+ o.write('use std\n')
+ o.write('use "types"\n')
+ o.write('use "gentypes"\n')
+ o.write('\n')
+ o.write('pkg {} =\n'.format(pkg))
+ o.write('\tconst emit\t:(a: assem#, insn : insn# -> void)\n')
+ o.write(';;\n'.format(pkg))
+ o.write('\n')
+
+ # emit function
+ # Note, because the compiler sucks and giant match statements are
+ # currently slower to compile than they should be, we're doing a
+ # simplified match here.
+ o.write('const emit = {a, insn\n')
+ o.write('\tmatch insn.op\n')
+ for (name, variants) in insntab.iteritems():
+ o.write('\t| `I{}:\temit_{}(a, insn.args[:])\n'.format(name, name))
+ o.write('\t;;\n')
+ o.write('}\n')
+
+ # emit_insn function
+ for (name, variants) in insntab.iteritems():
+ genemitter(o, name, variants)
+
+ o.close()
+
+def geninsn(pkg, insndef):
+ f = open(insndef, 'r')
+
+ insntab = collections.OrderedDict()
+ for ln in f.readlines():
+ if iscomment(ln):
+ continue
+ insn = parse(ln)
+ if insn.name not in insntab:
+ insntab[insn.name] = []
+ insntab[insn.name].append(insn)
+ gentype(pkg, insntab)
+ genemit(pkg, insntab)
+
+
+def genreg(pkg, regdef):
+ pass
+
+if __name__ == '__main__':
+ parser = argparse.ArgumentParser(description='generate instruction tables')
+ parser.add_argument('-i', dest='insndef', help='use this instruction description')
+ parser.add_argument('-r', dest='regdef', help='use this register description')
+ parser.add_argument('-p', dest='pkg', help='generate with this package name')
+ args = parser.parse_args()
+
+ geninsn(args.pkg, args.insndef)
+ #genreg(args.pkg, args.regdef)
+
diff --git a/genregs.awk b/genregs.awk
new file mode 100644
index 0000000..8aa0dca
--- /dev/null
+++ b/genregs.awk
@@ -0,0 +1,61 @@
+BEGIN {
+ nreg=0;
+}
+
+/^[ ]*#/ {next}
+/^[ ]*$/ {next}
+
+{
+ # Work around inconsistencies
+ if ($1 == "st0")
+ $3="fpu0,"$3
+ if (match($3, /^[scdt]reg$/))
+ $3 = "reg_" $3
+
+ # extract register classes
+ split($3, f, ",")
+ for (rc in f) {
+ regclass[f[rc]]=1
+ }
+
+ # figure out the ranges for things like r15-20
+ start = 0
+ end = 0
+ isrange=0
+ if (index($1, "-") > 0) {
+ match($1, /[0-9]*-[0-9]*/)
+ split(substr($1, RSTART, RLENGTH), range, "-")
+ base = substr($1, 0, RSTART-1)
+ suff = substr($1, RSTART+RLENGTH, length($1))
+ start = range[1]
+ end = range[2];
+ isrange = 1
+ }
+
+ # generate the register ids/constants
+ for (i = start; i <= end; i++) {
+ if (isrange)
+ regs[nreg]=base i suff
+ else
+ regs[nreg]=$1
+ regids[nreg]=$4 + i
+ nreg++
+ }
+}
+
+END {
+ print "pkg assem ="
+ for (i = 0; i < nreg; i++)
+ print "\tconst Argreg_"regs[i]"\t: uint32 = "i
+ maxreg=nreg
+ for (rc in regclass)
+ print "\tconst Arg"rc"\t: uint32 = "maxreg++
+ print ";;"
+ print ""
+
+ print "const regids = ["
+ for (i = 0; i < nreg; i++)
+ printf "\t%s,\t/* %s */\n", regids[i], regs[i]
+ print("]")
+}
+
diff --git a/genregs.sh b/genregs.sh
new file mode 100755
index 0000000..412af2b
--- /dev/null
+++ b/genregs.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+
+awk -f genregs.awk regs.dat > regs-gen.myr
diff --git a/gentables.sh b/gentables.sh
new file mode 100755
index 0000000..76979c5
--- /dev/null
+++ b/gentables.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+sed -e 's/ */ /g' \
+ -e 's/: /: /g' \
+ -e 's/\[ /[/g' "$1" |
+awk -f gen.awk > tables-gen.myr
diff --git a/insns.dat b/insns.dat
new file mode 100644
index 0000000..9ecb047
--- /dev/null
+++ b/insns.dat
@@ -0,0 +1,5324 @@
+;; --------------------------------------------------------------------------
+;;
+;; Copyright 1996-2016 The NASM Authors - All Rights Reserved
+;; See the file AUTHORS included with the NASM distribution for
+;; the specific copyright holders.
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following
+;; conditions are met:
+;;
+;; * Redistributions of source code must retain the above copyright
+;; notice, this list of conditions and the following disclaimer.
+;; * Redistributions in binary form must reproduce the above
+;; copyright notice, this list of conditions and the following
+;; disclaimer in the documentation and/or other materials provided
+;; with the distribution.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;; CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;; NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;
+; insns.dat table of instructions for the Netwide Assembler
+;
+; Format of file: All four fields must be present on every functional
+; line. Hence `void' for no-operand instructions, and `\0' for such
+; as EQU. If the last three fields are all `ignore', no action is
+; taken except to register the opcode as being present.
+;
+; For a detailed description of the code string (third field), please
+; see insns.pl and the comment at the top of assemble.c. For a detailed
+; description of the flags (fourth field), please see insns-iflags.pl.
+;
+; Comments with a pound sign after the semicolon generate section
+; subheaders in the NASM documentation.
+;
+
+;# Special instructions...
+DB ignore ignore ignore
+DW ignore ignore ignore
+DD ignore ignore ignore
+DQ ignore ignore ignore
+DT ignore ignore ignore
+DO ignore ignore ignore
+DY ignore ignore ignore
+DZ ignore ignore ignore
+RESB imm [ resb] 8086
+RESW ignore ignore ignore
+RESD ignore ignore ignore
+RESQ ignore ignore ignore
+REST ignore ignore ignore
+RESO ignore ignore ignore
+RESY ignore ignore ignore
+RESZ ignore ignore ignore
+
+;# Conventional instructions
+AAA void [ 37] 8086,NOLONG
+AAD void [ d5 0a] 8086,NOLONG
+AAD imm [i: d5 ib,u] 8086,SB,NOLONG
+AAM void [ d4 0a] 8086,NOLONG
+AAM imm [i: d4 ib,u] 8086,SB,NOLONG
+AAS void [ 3f] 8086,NOLONG
+ADC mem,reg8 [mr: hle 10 /r] 8086,SM,LOCK
+ADC reg8,reg8 [mr: 10 /r] 8086
+ADC mem,reg16 [mr: hle o16 11 /r] 8086,SM,LOCK
+ADC reg16,reg16 [mr: o16 11 /r] 8086
+ADC mem,reg32 [mr: hle o32 11 /r] 386,SM,LOCK
+ADC reg32,reg32 [mr: o32 11 /r] 386
+ADC mem,reg64 [mr: hle o64 11 /r] X64,SM,LOCK
+ADC reg64,reg64 [mr: o64 11 /r] X64
+ADC reg8,mem [rm: 12 /r] 8086,SM
+ADC reg8,reg8 [rm: 12 /r] 8086
+ADC reg16,mem [rm: o16 13 /r] 8086,SM
+ADC reg16,reg16 [rm: o16 13 /r] 8086
+ADC reg32,mem [rm: o32 13 /r] 386,SM
+ADC reg32,reg32 [rm: o32 13 /r] 386
+ADC reg64,mem [rm: o64 13 /r] X64,SM
+ADC reg64,reg64 [rm: o64 13 /r] X64
+ADC rm16,imm8 [mi: hle o16 83 /2 ib,s] 8086,LOCK
+ADC rm32,imm8 [mi: hle o32 83 /2 ib,s] 386,LOCK
+ADC rm64,imm8 [mi: hle o64 83 /2 ib,s] X64,LOCK
+ADC reg_al,imm [-i: 14 ib] 8086,SM
+ADC reg_ax,sbyteword [mi: o16 83 /2 ib,s] 8086,SM,ND
+ADC reg_ax,imm [-i: o16 15 iw] 8086,SM
+ADC reg_eax,sbytedword [mi: o32 83 /2 ib,s] 386,SM,ND
+ADC reg_eax,imm [-i: o32 15 id] 386,SM
+ADC reg_rax,sbytedword [mi: o64 83 /2 ib,s] X64,SM,ND
+ADC reg_rax,imm [-i: o64 15 id,s] X64,SM
+ADC rm8,imm [mi: hle 80 /2 ib] 8086,SM,LOCK
+ADC rm16,sbyteword [mi: hle o16 83 /2 ib,s] 8086,SM,LOCK,ND
+ADC rm16,imm [mi: hle o16 81 /2 iw] 8086,SM,LOCK
+ADC rm32,sbytedword [mi: hle o32 83 /2 ib,s] 386,SM,LOCK,ND
+ADC rm32,imm [mi: hle o32 81 /2 id] 386,SM,LOCK
+ADC rm64,sbytedword [mi: hle o64 83 /2 ib,s] X64,SM,LOCK,ND
+ADC rm64,imm [mi: hle o64 81 /2 id,s] X64,SM,LOCK
+ADC mem,imm8 [mi: hle 80 /2 ib] 8086,SM,LOCK,ND
+ADC mem,sbyteword16 [mi: hle o16 83 /2 ib,s] 8086,SM,LOCK,ND
+ADC mem,imm16 [mi: hle o16 81 /2 iw] 8086,SM,LOCK
+ADC mem,sbytedword32 [mi: hle o32 83 /2 ib,s] 386,SM,LOCK,ND
+ADC mem,imm32 [mi: hle o32 81 /2 id] 386,SM,LOCK
+ADC rm8,imm [mi: hle 82 /2 ib] 8086,SM,LOCK,ND,NOLONG
+ADD mem,reg8 [mr: hle 00 /r] 8086,SM,LOCK
+ADD reg8,reg8 [mr: 00 /r] 8086
+ADD mem,reg16 [mr: hle o16 01 /r] 8086,SM,LOCK
+ADD reg16,reg16 [mr: o16 01 /r] 8086
+ADD mem,reg32 [mr: hle o32 01 /r] 386,SM,LOCK
+ADD reg32,reg32 [mr: o32 01 /r] 386
+ADD mem,reg64 [mr: hle o64 01 /r] X64,SM,LOCK
+ADD reg64,reg64 [mr: o64 01 /r] X64
+ADD reg8,mem [rm: 02 /r] 8086,SM
+ADD reg8,reg8 [rm: 02 /r] 8086
+ADD reg16,mem [rm: o16 03 /r] 8086,SM
+ADD reg16,reg16 [rm: o16 03 /r] 8086
+ADD reg32,mem [rm: o32 03 /r] 386,SM
+ADD reg32,reg32 [rm: o32 03 /r] 386
+ADD reg64,mem [rm: o64 03 /r] X64,SM
+ADD reg64,reg64 [rm: o64 03 /r] X64
+ADD rm16,imm8 [mi: hle o16 83 /0 ib,s] 8086,LOCK
+ADD rm32,imm8 [mi: hle o32 83 /0 ib,s] 386,LOCK
+ADD rm64,imm8 [mi: hle o64 83 /0 ib,s] X64,LOCK
+ADD reg_al,imm [-i: 04 ib] 8086,SM
+ADD reg_ax,sbyteword [mi: o16 83 /0 ib,s] 8086,SM,ND
+ADD reg_ax,imm [-i: o16 05 iw] 8086,SM
+ADD reg_eax,sbytedword [mi: o32 83 /0 ib,s] 386,SM,ND
+ADD reg_eax,imm [-i: o32 05 id] 386,SM
+ADD reg_rax,sbytedword [mi: o64 83 /0 ib,s] X64,SM,ND
+ADD reg_rax,imm [-i: o64 05 id,s] X64,SM
+ADD rm8,imm [mi: hle 80 /0 ib] 8086,SM,LOCK
+ADD rm16,sbyteword [mi: hle o16 83 /0 ib,s] 8086,SM,LOCK,ND
+ADD rm16,imm [mi: hle o16 81 /0 iw] 8086,SM,LOCK
+ADD rm32,sbytedword [mi: hle o32 83 /0 ib,s] 386,SM,LOCK,ND
+ADD rm32,imm [mi: hle o32 81 /0 id] 386,SM,LOCK
+ADD rm64,sbytedword [mi: hle o64 83 /0 ib,s] X64,SM,LOCK,ND
+ADD rm64,imm [mi: hle o64 81 /0 id,s] X64,SM,LOCK
+ADD mem,imm8 [mi: hle 80 /0 ib] 8086,SM,LOCK
+ADD mem,sbyteword16 [mi: hle o16 83 /0 ib,s] 8086,SM,LOCK,ND
+ADD mem,imm16 [mi: hle o16 81 /0 iw] 8086,SM,LOCK
+ADD mem,sbytedword32 [mi: hle o32 83 /0 ib,s] 386,SM,LOCK,ND
+ADD mem,imm32 [mi: hle o32 81 /0 id] 386,SM,LOCK
+ADD rm8,imm [mi: hle 82 /0 ib] 8086,SM,LOCK,ND,NOLONG
+AND mem,reg8 [mr: hle 20 /r] 8086,SM,LOCK
+AND reg8,reg8 [mr: 20 /r] 8086
+AND mem,reg16 [mr: hle o16 21 /r] 8086,SM,LOCK
+AND reg16,reg16 [mr: o16 21 /r] 8086
+AND mem,reg32 [mr: hle o32 21 /r] 386,SM,LOCK
+AND reg32,reg32 [mr: o32 21 /r] 386
+AND mem,reg64 [mr: hle o64 21 /r] X64,SM,LOCK
+AND reg64,reg64 [mr: o64 21 /r] X64
+AND reg8,mem [rm: 22 /r] 8086,SM
+AND reg8,reg8 [rm: 22 /r] 8086
+AND reg16,mem [rm: o16 23 /r] 8086,SM
+AND reg16,reg16 [rm: o16 23 /r] 8086
+AND reg32,mem [rm: o32 23 /r] 386,SM
+AND reg32,reg32 [rm: o32 23 /r] 386
+AND reg64,mem [rm: o64 23 /r] X64,SM
+AND reg64,reg64 [rm: o64 23 /r] X64
+AND rm16,imm8 [mi: hle o16 83 /4 ib,s] 8086,LOCK
+AND rm32,imm8 [mi: hle o32 83 /4 ib,s] 386,LOCK
+AND rm64,imm8 [mi: hle o64 83 /4 ib,s] X64,LOCK
+AND reg_al,imm [-i: 24 ib] 8086,SM
+AND reg_ax,sbyteword [mi: o16 83 /4 ib,s] 8086,SM,ND
+AND reg_ax,imm [-i: o16 25 iw] 8086,SM
+AND reg_eax,sbytedword [mi: o32 83 /4 ib,s] 386,SM,ND
+AND reg_eax,imm [-i: o32 25 id] 386,SM
+AND reg_rax,sbytedword [mi: o64 83 /4 ib,s] X64,SM,ND
+AND reg_rax,imm [-i: o64 25 id,s] X64,SM
+AND rm8,imm [mi: hle 80 /4 ib] 8086,SM,LOCK
+AND rm16,sbyteword [mi: hle o16 83 /4 ib,s] 8086,SM,LOCK,ND
+AND rm16,imm [mi: hle o16 81 /4 iw] 8086,SM,LOCK
+AND rm32,sbytedword [mi: hle o32 83 /4 ib,s] 386,SM,LOCK,ND
+AND rm32,imm [mi: hle o32 81 /4 id] 386,SM,LOCK
+AND rm64,sbytedword [mi: hle o64 83 /4 ib,s] X64,SM,LOCK,ND
+AND rm64,imm [mi: hle o64 81 /4 id,s] X64,SM,LOCK
+AND mem,imm8 [mi: hle 80 /4 ib] 8086,SM,LOCK
+AND mem,sbyteword16 [mi: hle o16 83 /4 ib,s] 8086,SM,LOCK,ND
+AND mem,imm16 [mi: hle o16 81 /4 iw] 8086,SM,LOCK
+AND mem,sbytedword32 [mi: hle o32 83 /4 ib,s] 386,SM,LOCK,ND
+AND mem,imm32 [mi: hle o32 81 /4 id] 386,SM,LOCK
+AND rm8,imm [mi: hle 82 /4 ib] 8086,SM,LOCK,ND,NOLONG
+ARPL mem,reg16 [mr: 63 /r] 286,PROT,SM,NOLONG
+ARPL reg16,reg16 [mr: 63 /r] 286,PROT,NOLONG
+BB0_RESET void [ 0f 3a] PENT,CYRIX,ND,OBSOLETE
+BB1_RESET void [ 0f 3b] PENT,CYRIX,ND,OBSOLETE
+BOUND reg16,mem [rm: o16 62 /r] 186,NOLONG
+BOUND reg32,mem [rm: o32 62 /r] 386,NOLONG
+BSF reg16,mem [rm: o16 nof3 0f bc /r] 386,SM
+BSF reg16,reg16 [rm: o16 nof3 0f bc /r] 386
+BSF reg32,mem [rm: o32 nof3 0f bc /r] 386,SM
+BSF reg32,reg32 [rm: o32 nof3 0f bc /r] 386
+BSF reg64,mem [rm: o64 nof3 0f bc /r] X64,SM
+BSF reg64,reg64 [rm: o64 nof3 0f bc /r] X64
+BSR reg16,mem [rm: o16 nof3 0f bd /r] 386,SM
+BSR reg16,reg16 [rm: o16 nof3 0f bd /r] 386
+BSR reg32,mem [rm: o32 nof3 0f bd /r] 386,SM
+BSR reg32,reg32 [rm: o32 nof3 0f bd /r] 386
+BSR reg64,mem [rm: o64 nof3 0f bd /r] X64,SM
+BSR reg64,reg64 [rm: o64 nof3 0f bd /r] X64
+BSWAP reg32 [r: o32 0f c8+r] 486
+BSWAP reg64 [r: o64 0f c8+r] X64
+BT mem,reg16 [mr: o16 0f a3 /r] 386,SM
+BT reg16,reg16 [mr: o16 0f a3 /r] 386
+BT mem,reg32 [mr: o32 0f a3 /r] 386,SM
+BT reg32,reg32 [mr: o32 0f a3 /r] 386
+BT mem,reg64 [mr: o64 0f a3 /r] X64,SM
+BT reg64,reg64 [mr: o64 0f a3 /r] X64
+BT rm16,imm [mi: o16 0f ba /4 ib,u] 386,SB
+BT rm32,imm [mi: o32 0f ba /4 ib,u] 386,SB
+BT rm64,imm [mi: o64 0f ba /4 ib,u] X64,SB
+BTC mem,reg16 [mr: hle o16 0f bb /r] 386,SM,LOCK
+BTC reg16,reg16 [mr: o16 0f bb /r] 386
+BTC mem,reg32 [mr: hle o32 0f bb /r] 386,SM,LOCK
+BTC reg32,reg32 [mr: o32 0f bb /r] 386
+BTC mem,reg64 [mr: hle o64 0f bb /r] X64,SM,LOCK
+BTC reg64,reg64 [mr: o64 0f bb /r] X64
+BTC rm16,imm [mi: hle o16 0f ba /7 ib,u] 386,SB,LOCK
+BTC rm32,imm [mi: hle o32 0f ba /7 ib,u] 386,SB,LOCK
+BTC rm64,imm [mi: hle o64 0f ba /7 ib,u] X64,SB,LOCK
+BTR mem,reg16 [mr: hle o16 0f b3 /r] 386,SM,LOCK
+BTR reg16,reg16 [mr: o16 0f b3 /r] 386
+BTR mem,reg32 [mr: hle o32 0f b3 /r] 386,SM,LOCK
+BTR reg32,reg32 [mr: o32 0f b3 /r] 386
+BTR mem,reg64 [mr: hle o64 0f b3 /r] X64,SM,LOCK
+BTR reg64,reg64 [mr: o64 0f b3 /r] X64
+BTR rm16,imm [mi: hle o16 0f ba /6 ib,u] 386,SB,LOCK
+BTR rm32,imm [mi: hle o32 0f ba /6 ib,u] 386,SB,LOCK
+BTR rm64,imm [mi: hle o64 0f ba /6 ib,u] X64,SB,LOCK
+BTS mem,reg16 [mr: hle o16 0f ab /r] 386,SM,LOCK
+BTS reg16,reg16 [mr: o16 0f ab /r] 386
+BTS mem,reg32 [mr: hle o32 0f ab /r] 386,SM,LOCK
+BTS reg32,reg32 [mr: o32 0f ab /r] 386
+BTS mem,reg64 [mr: hle o64 0f ab /r] X64,SM,LOCK
+BTS reg64,reg64 [mr: o64 0f ab /r] X64
+BTS rm16,imm [mi: hle o16 0f ba /5 ib,u] 386,SB,LOCK
+BTS rm32,imm [mi: hle o32 0f ba /5 ib,u] 386,SB,LOCK
+BTS rm64,imm [mi: hle o64 0f ba /5 ib,u] X64,SB,LOCK
+CALL imm [i: odf e8 rel] 8086,BND
+CALL imm|near [i: odf e8 rel] 8086,ND,BND
+CALL imm|far [i: odf 9a iwd seg] 8086,ND,NOLONG
+; Call/jmp near imm/reg/mem is always 64-bit in long mode.
+CALL imm16 [i: o16 e8 rel] 8086,NOLONG,BND
+CALL imm16|near [i: o16 e8 rel] 8086,ND,NOLONG,BND
+CALL imm16|far [i: o16 9a iwd seg] 8086,ND,NOLONG
+CALL imm32 [i: o32 e8 rel] 386,NOLONG,BND
+CALL imm32|near [i: o32 e8 rel] 386,ND,NOLONG,BND
+CALL imm32|far [i: o32 9a iwd seg] 386,ND,NOLONG
+CALL imm64 [i: o64nw e8 rel] X64,BND
+CALL imm64|near [i: o64nw e8 rel] X64,ND,BND
+CALL imm:imm [ji: odf 9a iwd iw] 8086,NOLONG
+CALL imm16:imm [ji: o16 9a iw iw] 8086,NOLONG
+CALL imm:imm16 [ji: o16 9a iw iw] 8086,NOLONG
+CALL imm32:imm [ji: o32 9a id iw] 386,NOLONG
+CALL imm:imm32 [ji: o32 9a id iw] 386,NOLONG
+CALL mem|far [m: odf ff /3] 8086,NOLONG
+CALL mem|far [m: o64 ff /3] X64
+CALL mem16|far [m: o16 ff /3] 8086
+CALL mem32|far [m: o32 ff /3] 386
+CALL mem64|far [m: o64 ff /3] X64
+CALL mem|near [m: odf ff /2] 8086,ND,BND
+CALL rm16|near [m: o16 ff /2] 8086,NOLONG,ND,BND
+CALL rm32|near [m: o32 ff /2] 386,NOLONG,ND,BND
+CALL rm64|near [m: o64nw ff /2] X64,ND,BND
+CALL mem [m: odf ff /2] 8086,BND
+CALL rm16 [m: o16 ff /2] 8086,NOLONG,BND
+CALL rm32 [m: o32 ff /2] 386,NOLONG,BND
+CALL rm64 [m: o64nw ff /2] X64,BND
+
+CBW void [ o16 98] 8086
+CDQ void [ o32 99] 386
+CDQE void [ o64 98] X64
+CLC void [ f8] 8086
+CLD void [ fc] 8086
+CLI void [ fa] 8086
+CLTS void [ 0f 06] 286,PRIV
+CMC void [ f5] 8086
+CMP mem,reg8 [mr: 38 /r] 8086,SM
+CMP reg8,reg8 [mr: 38 /r] 8086
+CMP mem,reg16 [mr: o16 39 /r] 8086,SM
+CMP reg16,reg16 [mr: o16 39 /r] 8086
+CMP mem,reg32 [mr: o32 39 /r] 386,SM
+CMP reg32,reg32 [mr: o32 39 /r] 386
+CMP mem,reg64 [mr: o64 39 /r] X64,SM
+CMP reg64,reg64 [mr: o64 39 /r] X64
+CMP reg8,mem [rm: 3a /r] 8086,SM
+CMP reg8,reg8 [rm: 3a /r] 8086
+CMP reg16,mem [rm: o16 3b /r] 8086,SM
+CMP reg16,reg16 [rm: o16 3b /r] 8086
+CMP reg32,mem [rm: o32 3b /r] 386,SM
+CMP reg32,reg32 [rm: o32 3b /r] 386
+CMP reg64,mem [rm: o64 3b /r] X64,SM
+CMP reg64,reg64 [rm: o64 3b /r] X64
+CMP rm16,imm8 [mi: o16 83 /7 ib,s] 8086
+CMP rm32,imm8 [mi: o32 83 /7 ib,s] 386
+CMP rm64,imm8 [mi: o64 83 /7 ib,s] X64
+CMP reg_al,imm [-i: 3c ib] 8086,SM
+CMP reg_ax,sbyteword [mi: o16 83 /7 ib,s] 8086,SM,ND
+CMP reg_ax,imm [-i: o16 3d iw] 8086,SM
+CMP reg_eax,sbytedword [mi: o32 83 /7 ib,s] 386,SM,ND
+CMP reg_eax,imm [-i: o32 3d id] 386,SM
+CMP reg_rax,sbytedword [mi: o64 83 /7 ib,s] X64,SM,ND
+CMP reg_rax,imm [-i: o64 3d id,s] X64,SM
+CMP rm8,imm [mi: 80 /7 ib] 8086,SM
+CMP rm16,sbyteword [mi: o16 83 /7 ib,s] 8086,SM,ND
+CMP rm16,imm [mi: o16 81 /7 iw] 8086,SM
+CMP rm32,sbytedword [mi: o32 83 /7 ib,s] 386,SM,ND
+CMP rm32,imm [mi: o32 81 /7 id] 386,SM
+CMP rm64,sbytedword [mi: o64 83 /7 ib,s] X64,SM,ND
+CMP rm64,imm [mi: o64 81 /7 id,s] X64,SM
+CMP mem,imm8 [mi: 80 /7 ib] 8086,SM
+CMP mem,sbyteword16 [mi: o16 83 /7 ib,s] 8086,SM,ND
+CMP mem,imm16 [mi: o16 81 /7 iw] 8086,SM
+CMP mem,sbytedword32 [mi: o32 83 /7 ib,s] 386,SM,ND
+CMP mem,imm32 [mi: o32 81 /7 id] 386,SM
+CMP rm8,imm [mi: 82 /7 ib] 8086,SM,ND,NOLONG
+CMPSB void [ repe a6] 8086
+CMPSD void [ repe o32 a7] 386
+CMPSQ void [ repe o64 a7] X64
+CMPSW void [ repe o16 a7] 8086
+CMPXCHG mem,reg8 [mr: hle 0f b0 /r] PENT,SM,LOCK
+CMPXCHG reg8,reg8 [mr: 0f b0 /r] PENT
+CMPXCHG mem,reg16 [mr: hle o16 0f b1 /r] PENT,SM,LOCK
+CMPXCHG reg16,reg16 [mr: o16 0f b1 /r] PENT
+CMPXCHG mem,reg32 [mr: hle o32 0f b1 /r] PENT,SM,LOCK
+CMPXCHG reg32,reg32 [mr: o32 0f b1 /r] PENT
+CMPXCHG mem,reg64 [mr: hle o64 0f b1 /r] X64,SM,LOCK
+CMPXCHG reg64,reg64 [mr: o64 0f b1 /r] X64
+CMPXCHG486 mem,reg8 [mr: 0f a6 /r] 486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486 reg8,reg8 [mr: 0f a6 /r] 486,UNDOC,ND,OBSOLETE
+CMPXCHG486 mem,reg16 [mr: o16 0f a7 /r] 486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486 reg16,reg16 [mr: o16 0f a7 /r] 486,UNDOC,ND,OBSOLETE
+CMPXCHG486 mem,reg32 [mr: o32 0f a7 /r] 486,SM,UNDOC,ND,LOCK,OBSOLETE
+CMPXCHG486 reg32,reg32 [mr: o32 0f a7 /r] 486,UNDOC,ND,OBSOLETE
+CMPXCHG8B mem [m: hle norexw 0f c7 /1] PENT,LOCK
+CMPXCHG16B mem [m: o64 0f c7 /1] X64,LOCK
+CPUID void [ 0f a2] PENT
+CPU_READ void [ 0f 3d] PENT,CYRIX
+CPU_WRITE void [ 0f 3c] PENT,CYRIX
+CQO void [ o64 99] X64
+CWD void [ o16 99] 8086
+CWDE void [ o32 98] 386
+DAA void [ 27] 8086,NOLONG
+DAS void [ 2f] 8086,NOLONG
+DEC reg16 [r: o16 48+r] 8086,NOLONG
+DEC reg32 [r: o32 48+r] 386,NOLONG
+DEC rm8 [m: hle fe /1] 8086,LOCK
+DEC rm16 [m: hle o16 ff /1] 8086,LOCK
+DEC rm32 [m: hle o32 ff /1] 386,LOCK
+DEC rm64 [m: hle o64 ff /1] X64,LOCK
+DIV rm8 [m: f6 /6] 8086
+DIV rm16 [m: o16 f7 /6] 8086
+DIV rm32 [m: o32 f7 /6] 386
+DIV rm64 [m: o64 f7 /6] X64
+DMINT void [ 0f 39] P6,CYRIX
+EMMS void [ 0f 77] PENT,MMX
+ENTER imm,imm [ij: c8 iw ib,u] 186
+EQU imm ignore 8086
+EQU imm:imm ignore 8086
+F2XM1 void [ d9 f0] 8086,FPU
+FABS void [ d9 e1] 8086,FPU
+FADD mem32 [m: d8 /0] 8086,FPU
+FADD mem64 [m: dc /0] 8086,FPU
+FADD fpureg|to [r: dc c0+r] 8086,FPU
+FADD fpureg [r: d8 c0+r] 8086,FPU
+FADD fpureg,fpu0 [r-: dc c0+r] 8086,FPU
+FADD fpu0,fpureg [-r: d8 c0+r] 8086,FPU
+FADD void [ de c1] 8086,FPU,ND
+FADDP fpureg [r: de c0+r] 8086,FPU
+FADDP fpureg,fpu0 [r-: de c0+r] 8086,FPU
+FADDP void [ de c1] 8086,FPU,ND
+FBLD mem80 [m: df /4] 8086,FPU
+FBLD mem [m: df /4] 8086,FPU
+FBSTP mem80 [m: df /6] 8086,FPU
+FBSTP mem [m: df /6] 8086,FPU
+FCHS void [ d9 e0] 8086,FPU
+FCLEX void [ wait db e2] 8086,FPU
+FCMOVB fpureg [r: da c0+r] P6,FPU
+FCMOVB fpu0,fpureg [-r: da c0+r] P6,FPU
+FCMOVB void [ da c1] P6,FPU,ND
+FCMOVBE fpureg [r: da d0+r] P6,FPU
+FCMOVBE fpu0,fpureg [-r: da d0+r] P6,FPU
+FCMOVBE void [ da d1] P6,FPU,ND
+FCMOVE fpureg [r: da c8+r] P6,FPU
+FCMOVE fpu0,fpureg [-r: da c8+r] P6,FPU
+FCMOVE void [ da c9] P6,FPU,ND
+FCMOVNB fpureg [r: db c0+r] P6,FPU
+FCMOVNB fpu0,fpureg [-r: db c0+r] P6,FPU
+FCMOVNB void [ db c1] P6,FPU,ND
+FCMOVNBE fpureg [r: db d0+r] P6,FPU
+FCMOVNBE fpu0,fpureg [-r: db d0+r] P6,FPU
+FCMOVNBE void [ db d1] P6,FPU,ND
+FCMOVNE fpureg [r: db c8+r] P6,FPU
+FCMOVNE fpu0,fpureg [-r: db c8+r] P6,FPU
+FCMOVNE void [ db c9] P6,FPU,ND
+FCMOVNU fpureg [r: db d8+r] P6,FPU
+FCMOVNU fpu0,fpureg [-r: db d8+r] P6,FPU
+FCMOVNU void [ db d9] P6,FPU,ND
+FCMOVU fpureg [r: da d8+r] P6,FPU
+FCMOVU fpu0,fpureg [-r: da d8+r] P6,FPU
+FCMOVU void [ da d9] P6,FPU,ND
+FCOM mem32 [m: d8 /2] 8086,FPU
+FCOM mem64 [m: dc /2] 8086,FPU
+FCOM fpureg [r: d8 d0+r] 8086,FPU
+FCOM fpu0,fpureg [-r: d8 d0+r] 8086,FPU
+FCOM void [ d8 d1] 8086,FPU,ND
+FCOMI fpureg [r: db f0+r] P6,FPU
+FCOMI fpu0,fpureg [-r: db f0+r] P6,FPU
+FCOMI void [ db f1] P6,FPU,ND
+FCOMIP fpureg [r: df f0+r] P6,FPU
+FCOMIP fpu0,fpureg [-r: df f0+r] P6,FPU
+FCOMIP void [ df f1] P6,FPU,ND
+FCOMP mem32 [m: d8 /3] 8086,FPU
+FCOMP mem64 [m: dc /3] 8086,FPU
+FCOMP fpureg [r: d8 d8+r] 8086,FPU
+FCOMP fpu0,fpureg [-r: d8 d8+r] 8086,FPU
+FCOMP void [ d8 d9] 8086,FPU,ND
+FCOMPP void [ de d9] 8086,FPU
+FCOS void [ d9 ff] 386,FPU
+FDECSTP void [ d9 f6] 8086,FPU
+FDISI void [ wait db e1] 8086,FPU
+FDIV mem32 [m: d8 /6] 8086,FPU
+FDIV mem64 [m: dc /6] 8086,FPU
+FDIV fpureg|to [r: dc f8+r] 8086,FPU
+FDIV fpureg [r: d8 f0+r] 8086,FPU
+FDIV fpureg,fpu0 [r-: dc f8+r] 8086,FPU
+FDIV fpu0,fpureg [-r: d8 f0+r] 8086,FPU
+FDIV void [ de f9] 8086,FPU,ND
+FDIVP fpureg [r: de f8+r] 8086,FPU
+FDIVP fpureg,fpu0 [r-: de f8+r] 8086,FPU
+FDIVP void [ de f9] 8086,FPU,ND
+FDIVR mem32 [m: d8 /7] 8086,FPU
+FDIVR mem64 [m: dc /7] 8086,FPU
+FDIVR fpureg|to [r: dc f0+r] 8086,FPU
+FDIVR fpureg,fpu0 [r-: dc f0+r] 8086,FPU
+FDIVR fpureg [r: d8 f8+r] 8086,FPU
+FDIVR fpu0,fpureg [-r: d8 f8+r] 8086,FPU
+FDIVR void [ de f1] 8086,FPU,ND
+FDIVRP fpureg [r: de f0+r] 8086,FPU
+FDIVRP fpureg,fpu0 [r-: de f0+r] 8086,FPU
+FDIVRP void [ de f1] 8086,FPU,ND
+FEMMS void [ 0f 0e] PENT,3DNOW
+FENI void [ wait db e0] 8086,FPU
+FFREE fpureg [r: dd c0+r] 8086,FPU
+FFREE void [ dd c1] 8086,FPU
+FFREEP fpureg [r: df c0+r] 286,FPU,UNDOC
+FFREEP void [ df c1] 286,FPU,UNDOC
+FIADD mem32 [m: da /0] 8086,FPU
+FIADD mem16 [m: de /0] 8086,FPU
+FICOM mem32 [m: da /2] 8086,FPU
+FICOM mem16 [m: de /2] 8086,FPU
+FICOMP mem32 [m: da /3] 8086,FPU
+FICOMP mem16 [m: de /3] 8086,FPU
+FIDIV mem32 [m: da /6] 8086,FPU
+FIDIV mem16 [m: de /6] 8086,FPU
+FIDIVR mem32 [m: da /7] 8086,FPU
+FIDIVR mem16 [m: de /7] 8086,FPU
+FILD mem32 [m: db /0] 8086,FPU
+FILD mem16 [m: df /0] 8086,FPU
+FILD mem64 [m: df /5] 8086,FPU
+FIMUL mem32 [m: da /1] 8086,FPU
+FIMUL mem16 [m: de /1] 8086,FPU
+FINCSTP void [ d9 f7] 8086,FPU
+FINIT void [ wait db e3] 8086,FPU
+FIST mem32 [m: db /2] 8086,FPU
+FIST mem16 [m: df /2] 8086,FPU
+FISTP mem32 [m: db /3] 8086,FPU
+FISTP mem16 [m: df /3] 8086,FPU
+FISTP mem64 [m: df /7] 8086,FPU
+FISTTP mem16 [m: df /1] PRESCOTT,FPU
+FISTTP mem32 [m: db /1] PRESCOTT,FPU
+FISTTP mem64 [m: dd /1] PRESCOTT,FPU
+FISUB mem32 [m: da /4] 8086,FPU
+FISUB mem16 [m: de /4] 8086,FPU
+FISUBR mem32 [m: da /5] 8086,FPU
+FISUBR mem16 [m: de /5] 8086,FPU
+FLD mem32 [m: d9 /0] 8086,FPU
+FLD mem64 [m: dd /0] 8086,FPU
+FLD mem80 [m: db /5] 8086,FPU
+FLD fpureg [r: d9 c0+r] 8086,FPU
+FLD void [ d9 c1] 8086,FPU,ND
+FLD1 void [ d9 e8] 8086,FPU
+FLDCW mem [m: d9 /5] 8086,FPU,SW
+FLDENV mem [m: d9 /4] 8086,FPU
+FLDL2E void [ d9 ea] 8086,FPU
+FLDL2T void [ d9 e9] 8086,FPU
+FLDLG2 void [ d9 ec] 8086,FPU
+FLDLN2 void [ d9 ed] 8086,FPU
+FLDPI void [ d9 eb] 8086,FPU
+FLDZ void [ d9 ee] 8086,FPU
+FMUL mem32 [m: d8 /1] 8086,FPU
+FMUL mem64 [m: dc /1] 8086,FPU
+FMUL fpureg|to [r: dc c8+r] 8086,FPU
+FMUL fpureg,fpu0 [r-: dc c8+r] 8086,FPU
+FMUL fpureg [r: d8 c8+r] 8086,FPU
+FMUL fpu0,fpureg [-r: d8 c8+r] 8086,FPU
+FMUL void [ de c9] 8086,FPU,ND
+FMULP fpureg [r: de c8+r] 8086,FPU
+FMULP fpureg,fpu0 [r-: de c8+r] 8086,FPU
+FMULP void [ de c9] 8086,FPU,ND
+FNCLEX void [ db e2] 8086,FPU
+FNDISI void [ db e1] 8086,FPU
+FNENI void [ db e0] 8086,FPU
+FNINIT void [ db e3] 8086,FPU
+FNOP void [ d9 d0] 8086,FPU
+FNSAVE mem [m: dd /6] 8086,FPU
+FNSTCW mem [m: d9 /7] 8086,FPU,SW
+FNSTENV mem [m: d9 /6] 8086,FPU
+FNSTSW mem [m: dd /7] 8086,FPU,SW
+FNSTSW reg_ax [-: df e0] 286,FPU
+FPATAN void [ d9 f3] 8086,FPU
+FPREM void [ d9 f8] 8086,FPU
+FPREM1 void [ d9 f5] 386,FPU
+FPTAN void [ d9 f2] 8086,FPU
+FRNDINT void [ d9 fc] 8086,FPU
+FRSTOR mem [m: dd /4] 8086,FPU
+FSAVE mem [m: wait dd /6] 8086,FPU
+FSCALE void [ d9 fd] 8086,FPU
+FSETPM void [ db e4] 286,FPU
+FSIN void [ d9 fe] 386,FPU
+FSINCOS void [ d9 fb] 386,FPU
+FSQRT void [ d9 fa] 8086,FPU
+FST mem32 [m: d9 /2] 8086,FPU
+FST mem64 [m: dd /2] 8086,FPU
+FST fpureg [r: dd d0+r] 8086,FPU
+FST void [ dd d1] 8086,FPU,ND
+FSTCW mem [m: wait d9 /7] 8086,FPU,SW
+FSTENV mem [m: wait d9 /6] 8086,FPU
+FSTP mem32 [m: d9 /3] 8086,FPU
+FSTP mem64 [m: dd /3] 8086,FPU
+FSTP mem80 [m: db /7] 8086,FPU
+FSTP fpureg [r: dd d8+r] 8086,FPU
+FSTP void [ dd d9] 8086,FPU,ND
+FSTSW mem [m: wait dd /7] 8086,FPU,SW
+FSTSW reg_ax [-: wait df e0] 286,FPU
+FSUB mem32 [m: d8 /4] 8086,FPU
+FSUB mem64 [m: dc /4] 8086,FPU
+FSUB fpureg|to [r: dc e8+r] 8086,FPU
+FSUB fpureg,fpu0 [r-: dc e8+r] 8086,FPU
+FSUB fpureg [r: d8 e0+r] 8086,FPU
+FSUB fpu0,fpureg [-r: d8 e0+r] 8086,FPU
+FSUB void [ de e9] 8086,FPU,ND
+FSUBP fpureg [r: de e8+r] 8086,FPU
+FSUBP fpureg,fpu0 [r-: de e8+r] 8086,FPU
+FSUBP void [ de e9] 8086,FPU,ND
+FSUBR mem32 [m: d8 /5] 8086,FPU
+FSUBR mem64 [m: dc /5] 8086,FPU
+FSUBR fpureg|to [r: dc e0+r] 8086,FPU
+FSUBR fpureg,fpu0 [r-: dc e0+r] 8086,FPU
+FSUBR fpureg [r: d8 e8+r] 8086,FPU
+FSUBR fpu0,fpureg [-r: d8 e8+r] 8086,FPU
+FSUBR void [ de e1] 8086,FPU,ND
+FSUBRP fpureg [r: de e0+r] 8086,FPU
+FSUBRP fpureg,fpu0 [r-: de e0+r] 8086,FPU
+FSUBRP void [ de e1] 8086,FPU,ND
+FTST void [ d9 e4] 8086,FPU
+FUCOM fpureg [r: dd e0+r] 386,FPU
+FUCOM fpu0,fpureg [-r: dd e0+r] 386,FPU
+FUCOM void [ dd e1] 386,FPU,ND
+FUCOMI fpureg [r: db e8+r] P6,FPU
+FUCOMI fpu0,fpureg [-r: db e8+r] P6,FPU
+FUCOMI void [ db e9] P6,FPU,ND
+FUCOMIP fpureg [r: df e8+r] P6,FPU
+FUCOMIP fpu0,fpureg [-r: df e8+r] P6,FPU
+FUCOMIP void [ df e9] P6,FPU,ND
+FUCOMP fpureg [r: dd e8+r] 386,FPU
+FUCOMP fpu0,fpureg [-r: dd e8+r] 386,FPU
+FUCOMP void [ dd e9] 386,FPU,ND
+FUCOMPP void [ da e9] 386,FPU
+FXAM void [ d9 e5] 8086,FPU
+FXCH fpureg [r: d9 c8+r] 8086,FPU
+FXCH fpureg,fpu0 [r-: d9 c8+r] 8086,FPU
+FXCH fpu0,fpureg [-r: d9 c8+r] 8086,FPU
+FXCH void [ d9 c9] 8086,FPU,ND
+FXTRACT void [ d9 f4] 8086,FPU
+FYL2X void [ d9 f1] 8086,FPU
+FYL2XP1 void [ d9 f9] 8086,FPU
+HLT void [ f4] 8086,PRIV
+IBTS mem,reg16 [mr: o16 0f a7 /r] 386,SW,UNDOC,ND,OBSOLETE
+IBTS reg16,reg16 [mr: o16 0f a7 /r] 386,UNDOC,ND,OBSOLETE
+IBTS mem,reg32 [mr: o32 0f a7 /r] 386,SD,UNDOC,ND,OBSOLETE
+IBTS reg32,reg32 [mr: o32 0f a7 /r] 386,UNDOC,ND,OBSOLETE
+ICEBP void [ f1] 386,ND
+IDIV rm8 [m: f6 /7] 8086
+IDIV rm16 [m: o16 f7 /7] 8086
+IDIV rm32 [m: o32 f7 /7] 386
+IDIV rm64 [m: o64 f7 /7] X64
+IMUL rm8 [m: f6 /5] 8086
+IMUL rm16 [m: o16 f7 /5] 8086
+IMUL rm32 [m: o32 f7 /5] 386
+IMUL rm64 [m: o64 f7 /5] X64
+IMUL reg16,mem [rm: o16 0f af /r] 386,SM
+IMUL reg16,reg16 [rm: o16 0f af /r] 386
+IMUL reg32,mem [rm: o32 0f af /r] 386,SM
+IMUL reg32,reg32 [rm: o32 0f af /r] 386
+IMUL reg64,mem [rm: o64 0f af /r] X64,SM
+IMUL reg64,reg64 [rm: o64 0f af /r] X64
+IMUL reg16,mem,imm8 [rmi: o16 6b /r ib,s] 186,SM
+IMUL reg16,mem,sbyteword [rmi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,mem,imm16 [rmi: o16 69 /r iw] 186,SM
+IMUL reg16,mem,imm [rmi: o16 69 /r iw] 186,SM,ND
+IMUL reg16,reg16,imm8 [rmi: o16 6b /r ib,s] 186
+IMUL reg16,reg16,sbyteword [rmi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,reg16,imm16 [rmi: o16 69 /r iw] 186
+IMUL reg16,reg16,imm [rmi: o16 69 /r iw] 186,SM,ND
+IMUL reg32,mem,imm8 [rmi: o32 6b /r ib,s] 386,SM
+IMUL reg32,mem,sbytedword [rmi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,mem,imm32 [rmi: o32 69 /r id] 386,SM
+IMUL reg32,mem,imm [rmi: o32 69 /r id] 386,SM,ND
+IMUL reg32,reg32,imm8 [rmi: o32 6b /r ib,s] 386
+IMUL reg32,reg32,sbytedword [rmi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,reg32,imm32 [rmi: o32 69 /r id] 386
+IMUL reg32,reg32,imm [rmi: o32 69 /r id] 386,SM,ND
+IMUL reg64,mem,imm8 [rmi: o64 6b /r ib,s] X64,SM
+IMUL reg64,mem,sbytedword [rmi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,mem,imm32 [rmi: o64 69 /r id] X64,SM
+IMUL reg64,mem,imm [rmi: o64 69 /r id,s] X64,SM,ND
+IMUL reg64,reg64,imm8 [rmi: o64 6b /r ib,s] X64
+IMUL reg64,reg64,sbytedword [rmi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,reg64,imm32 [rmi: o64 69 /r id] X64
+IMUL reg64,reg64,imm [rmi: o64 69 /r id,s] X64,SM,ND
+IMUL reg16,imm8 [r+mi: o16 6b /r ib,s] 186
+IMUL reg16,sbyteword [r+mi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,imm16 [r+mi: o16 69 /r iw] 186
+IMUL reg16,imm [r+mi: o16 69 /r iw] 186,SM,ND
+IMUL reg32,imm8 [r+mi: o32 6b /r ib,s] 386
+IMUL reg32,sbytedword [r+mi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,imm32 [r+mi: o32 69 /r id] 386
+IMUL reg32,imm [r+mi: o32 69 /r id] 386,SM,ND
+IMUL reg64,imm8 [r+mi: o64 6b /r ib,s] X64
+IMUL reg64,sbytedword [r+mi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,imm32 [r+mi: o64 69 /r id,s] X64
+IMUL reg64,imm [r+mi: o64 69 /r id,s] X64,SM,ND
+IN reg_al,imm [-i: e4 ib,u] 8086,SB
+IN reg_ax,imm [-i: o16 e5 ib,u] 8086,SB
+IN reg_eax,imm [-i: o32 e5 ib,u] 386,SB
+IN reg_al,reg_dx [--: ec] 8086
+IN reg_ax,reg_dx [--: o16 ed] 8086
+IN reg_eax,reg_dx [--: o32 ed] 386
+INC reg16 [r: o16 40+r] 8086,NOLONG
+INC reg32 [r: o32 40+r] 386,NOLONG
+INC rm8 [m: hle fe /0] 8086,LOCK
+INC rm16 [m: hle o16 ff /0] 8086,LOCK
+INC rm32 [m: hle o32 ff /0] 386,LOCK
+INC rm64 [m: hle o64 ff /0] X64,LOCK
+INCBIN ignore ignore ignore
+INSB void [ 6c] 186
+INSD void [ o32 6d] 386
+INSW void [ o16 6d] 186
+INT imm [i: cd ib,u] 8086,SB
+INT01 void [ f1] 386,ND
+INT1 void [ f1] 386
+INT03 void [ cc] 8086,ND
+INT3 void [ cc] 8086
+INTO void [ ce] 8086,NOLONG
+INVD void [ 0f 08] 486,PRIV
+INVPCID reg32,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,NOLONG
+INVPCID reg64,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,LONG
+INVLPG mem [m: 0f 01 /7] 486,PRIV
+INVLPGA reg_ax,reg_ecx [--: a16 0f 01 df] X86_64,AMD,NOLONG
+INVLPGA reg_eax,reg_ecx [--: a32 0f 01 df] X86_64,AMD
+INVLPGA reg_rax,reg_ecx [--: o64nw a64 0f 01 df] X64,AMD
+INVLPGA void [ 0f 01 df] X86_64,AMD
+IRET void [ odf cf] 8086
+IRETD void [ o32 cf] 386
+IRETQ void [ o64 cf] X64
+IRETW void [ o16 cf] 8086
+JCXZ imm [i: a16 e3 rel8] 8086,NOLONG
+JECXZ imm [i: a32 e3 rel8] 386
+JRCXZ imm [i: a64 e3 rel8] X64
+JMP imm|short [i: eb rel8] 8086
+JMP imm [i: jmp8 eb rel8] 8086,ND
+JMP imm [i: odf e9 rel] 8086,BND
+JMP imm|near [i: odf e9 rel] 8086,ND,BND
+JMP imm|far [i: odf ea iwd seg] 8086,ND,NOLONG
+; Call/jmp near imm/reg/mem is always 64-bit in long mode.
+JMP imm16 [i: o16 e9 rel] 8086,NOLONG,BND
+JMP imm16|near [i: o16 e9 rel] 8086,ND,NOLONG,BND
+JMP imm16|far [i: o16 ea iwd seg] 8086,ND,NOLONG
+JMP imm32 [i: o32 e9 rel] 386,NOLONG,BND
+JMP imm32|near [i: o32 e9 rel] 386,ND,NOLONG,BND
+JMP imm32|far [i: o32 ea iwd seg] 386,ND,NOLONG
+JMP imm64 [i: o64nw e9 rel] X64,BND
+JMP imm64|near [i: o64nw e9 rel] X64,ND,BND
+JMP imm:imm [ji: odf ea iwd iw] 8086,NOLONG
+JMP imm16:imm [ji: o16 ea iw iw] 8086,NOLONG
+JMP imm:imm16 [ji: o16 ea iw iw] 8086,NOLONG
+JMP imm32:imm [ji: o32 ea id iw] 386,NOLONG
+JMP imm:imm32 [ji: o32 ea id iw] 386,NOLONG
+JMP mem|far [m: odf ff /5] 8086,NOLONG
+JMP mem|far [m: o64 ff /5] X64
+JMP mem16|far [m: o16 ff /5] 8086
+JMP mem32|far [m: o32 ff /5] 386
+JMP mem64|far [m: o64 ff /5] X64
+JMP mem|near [m: odf ff /4] 8086,ND,BND
+JMP rm16|near [m: o16 ff /4] 8086,NOLONG,ND,BND
+JMP rm32|near [m: o32 ff /4] 386,NOLONG,ND,BND
+JMP rm64|near [m: o64nw ff /4] X64,ND,BND
+JMP mem [m: odf ff /4] 8086,BND
+JMP rm16 [m: o16 ff /4] 8086,NOLONG,BND
+JMP rm32 [m: o32 ff /4] 386,NOLONG,BND
+JMP rm64 [m: o64nw ff /4] X64,BND
+
+JMPE imm [i: odf 0f b8 rel] IA64
+JMPE imm16 [i: o16 0f b8 rel] IA64
+JMPE imm32 [i: o32 0f b8 rel] IA64
+JMPE rm16 [m: o16 0f 00 /6] IA64
+JMPE rm32 [m: o32 0f 00 /6] IA64
+LAHF void [ 9f] 8086
+LAR reg16,mem [rm: o16 0f 02 /r] 286,PROT,SW
+LAR reg16,reg16 [rm: o16 0f 02 /r] 286,PROT
+LAR reg16,reg32 [rm: o16 0f 02 /r] 386,PROT
+LAR reg16,reg64 [rm: o16 o64nw 0f 02 /r] X64,PROT,ND
+LAR reg32,mem [rm: o32 0f 02 /r] 386,PROT,SW
+LAR reg32,reg16 [rm: o32 0f 02 /r] 386,PROT
+LAR reg32,reg32 [rm: o32 0f 02 /r] 386,PROT
+LAR reg32,reg64 [rm: o32 o64nw 0f 02 /r] X64,PROT,ND
+LAR reg64,mem [rm: o64 0f 02 /r] X64,PROT,SW
+LAR reg64,reg16 [rm: o64 0f 02 /r] X64,PROT
+LAR reg64,reg32 [rm: o64 0f 02 /r] X64,PROT
+LAR reg64,reg64 [rm: o64 0f 02 /r] X64,PROT
+LDS reg16,mem [rm: o16 c5 /r] 8086,NOLONG
+LDS reg32,mem [rm: o32 c5 /r] 386,NOLONG
+LEA reg16,mem [rm: o16 8d /r] 8086
+LEA reg32,mem [rm: o32 8d /r] 386
+LEA reg64,mem [rm: o64 8d /r] X64
+LEAVE void [ c9] 186
+LES reg16,mem [rm: o16 c4 /r] 8086,NOLONG
+LES reg32,mem [rm: o32 c4 /r] 386,NOLONG
+LFENCE void [ np 0f ae e8] X64,AMD
+LFS reg16,mem [rm: o16 0f b4 /r] 386
+LFS reg32,mem [rm: o32 0f b4 /r] 386
+LFS reg64,mem [rm: o64 0f b4 /r] X64
+LGDT mem [m: 0f 01 /2] 286,PRIV
+LGS reg16,mem [rm: o16 0f b5 /r] 386
+LGS reg32,mem [rm: o32 0f b5 /r] 386
+LGS reg64,mem [rm: o64 0f b5 /r] X64
+LIDT mem [m: 0f 01 /3] 286,PRIV
+LLDT mem [m: 0f 00 /2] 286,PROT,PRIV
+LLDT mem16 [m: 0f 00 /2] 286,PROT,PRIV
+LLDT reg16 [m: 0f 00 /2] 286,PROT,PRIV
+LMSW mem [m: 0f 01 /6] 286,PRIV
+LMSW mem16 [m: 0f 01 /6] 286,PRIV
+LMSW reg16 [m: 0f 01 /6] 286,PRIV
+LOADALL void [ 0f 07] 386,UNDOC,ND,OBSOLETE
+LOADALL286 void [ 0f 05] 286,UNDOC,ND,OBSOLETE
+LODSB void [ ac] 8086
+LODSD void [ o32 ad] 386
+LODSQ void [ o64 ad] X64
+LODSW void [ o16 ad] 8086
+LOOP imm [i: adf e2 rel8] 8086
+LOOP imm,reg_cx [i-: a16 e2 rel8] 8086,NOLONG
+LOOP imm,reg_ecx [i-: a32 e2 rel8] 386
+LOOP imm,reg_rcx [i-: a64 e2 rel8] X64
+LOOPE imm [i: adf e1 rel8] 8086
+LOOPE imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
+LOOPE imm,reg_ecx [i-: a32 e1 rel8] 386
+LOOPE imm,reg_rcx [i-: a64 e1 rel8] X64
+LOOPNE imm [i: adf e0 rel8] 8086
+LOOPNE imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
+LOOPNE imm,reg_ecx [i-: a32 e0 rel8] 386
+LOOPNE imm,reg_rcx [i-: a64 e0 rel8] X64
+LOOPNZ imm [i: adf e0 rel8] 8086
+LOOPNZ imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
+LOOPNZ imm,reg_ecx [i-: a32 e0 rel8] 386
+LOOPNZ imm,reg_rcx [i-: a64 e0 rel8] X64
+LOOPZ imm [i: adf e1 rel8] 8086
+LOOPZ imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
+LOOPZ imm,reg_ecx [i-: a32 e1 rel8] 386
+LOOPZ imm,reg_rcx [i-: a64 e1 rel8] X64
+LSL reg16,mem [rm: o16 0f 03 /r] 286,PROT,SW
+LSL reg16,reg16 [rm: o16 0f 03 /r] 286,PROT
+LSL reg16,reg32 [rm: o16 0f 03 /r] 386,PROT
+LSL reg16,reg64 [rm: o16 o64nw 0f 03 /r] X64,PROT,ND
+LSL reg32,mem [rm: o32 0f 03 /r] 386,PROT,SW
+LSL reg32,reg16 [rm: o32 0f 03 /r] 386,PROT
+LSL reg32,reg32 [rm: o32 0f 03 /r] 386,PROT
+LSL reg32,reg64 [rm: o32 o64nw 0f 03 /r] X64,PROT,ND
+LSL reg64,mem [rm: o64 0f 03 /r] X64,PROT,SW
+LSL reg64,reg16 [rm: o64 0f 03 /r] X64,PROT
+LSL reg64,reg32 [rm: o64 0f 03 /r] X64,PROT
+LSL reg64,reg64 [rm: o64 0f 03 /r] X64,PROT
+LSS reg16,mem [rm: o16 0f b2 /r] 386
+LSS reg32,mem [rm: o32 0f b2 /r] 386
+LSS reg64,mem [rm: o64 0f b2 /r] X64
+LTR mem [m: 0f 00 /3] 286,PROT,PRIV
+LTR mem16 [m: 0f 00 /3] 286,PROT,PRIV
+LTR reg16 [m: 0f 00 /3] 286,PROT,PRIV
+MFENCE void [ np 0f ae f0] X64,AMD
+MONITOR void [ 0f 01 c8] PRESCOTT
+MONITOR reg_eax,reg_ecx,reg_edx [---: 0f 01 c8] PRESCOTT,NOLONG,ND
+MONITOR reg_rax,reg_ecx,reg_edx [---: 0f 01 c8] X64,ND
+MONITORX void [ 0f 01 fa] AMD
+MONITORX reg_rax,reg_ecx,reg_edx [---: 0f 01 fa] X64,AMD,ND
+MONITORX reg_eax,reg_ecx,reg_edx [---: 0f 01 fa] AMD,ND
+MONITORX reg_ax,reg_ecx,reg_edx [---: 0f 01 fa] AMD,ND
+MOV mem,reg_sreg [mr: 8c /r] 8086,SW
+MOV reg16,reg_sreg [mr: o16 8c /r] 8086
+MOV reg32,reg_sreg [mr: o32 8c /r] 386
+MOV reg64,reg_sreg [mr: o64nw 8c /r] X64,OPT,ND
+MOV rm64,reg_sreg [mr: o64 8c /r] X64
+MOV reg_sreg,mem [rm: 8e /r] 8086,SW
+MOV reg_sreg,reg16 [rm: 8e /r] 8086,OPT,ND
+MOV reg_sreg,reg32 [rm: 8e /r] 386,OPT,ND
+MOV reg_sreg,reg64 [rm: o64nw 8e /r] X64,OPT,ND
+MOV reg_sreg,reg16 [rm: o16 8e /r] 8086
+MOV reg_sreg,reg32 [rm: o32 8e /r] 386
+MOV reg_sreg,rm64 [rm: o64 8e /r] X64
+MOV reg_al,mem_offs [-i: a0 iwdq] 8086,SM
+MOV reg_ax,mem_offs [-i: o16 a1 iwdq] 8086,SM
+MOV reg_eax,mem_offs [-i: o32 a1 iwdq] 386,SM
+MOV reg_rax,mem_offs [-i: o64 a1 iwdq] X64,SM
+MOV mem_offs,reg_al [i-: a2 iwdq] 8086,SM,NOHLE
+MOV mem_offs,reg_ax [i-: o16 a3 iwdq] 8086,SM,NOHLE
+MOV mem_offs,reg_eax [i-: o32 a3 iwdq] 386,SM,NOHLE
+MOV mem_offs,reg_rax [i-: o64 a3 iwdq] X64,SM,NOHLE
+MOV reg32,reg_creg [mr: rex.l 0f 20 /r] 386,PRIV,NOLONG
+MOV reg64,reg_creg [mr: o64nw 0f 20 /r] X64,PRIV
+MOV reg_creg,reg32 [rm: rex.l 0f 22 /r] 386,PRIV,NOLONG
+MOV reg_creg,reg64 [rm: o64nw 0f 22 /r] X64,PRIV
+MOV reg32,reg_dreg [mr: 0f 21 /r] 386,PRIV,NOLONG
+MOV reg64,reg_dreg [mr: o64nw 0f 21 /r] X64,PRIV
+MOV reg_dreg,reg32 [rm: 0f 23 /r] 386,PRIV,NOLONG
+MOV reg_dreg,reg64 [rm: o64nw 0f 23 /r] X64,PRIV
+MOV reg32,reg_treg [mr: 0f 24 /r] 386,NOLONG,ND
+MOV reg_treg,reg32 [rm: 0f 26 /r] 386,NOLONG,ND
+MOV mem,reg8 [mr: hlexr 88 /r] 8086,SM
+MOV reg8,reg8 [mr: 88 /r] 8086
+MOV mem,reg16 [mr: hlexr o16 89 /r] 8086,SM
+MOV reg16,reg16 [mr: o16 89 /r] 8086
+MOV mem,reg32 [mr: hlexr o32 89 /r] 386,SM
+MOV reg32,reg32 [mr: o32 89 /r] 386
+MOV mem,reg64 [mr: hlexr o64 89 /r] X64,SM
+MOV reg64,reg64 [mr: o64 89 /r] X64
+MOV reg8,mem [rm: 8a /r] 8086,SM
+MOV reg8,reg8 [rm: 8a /r] 8086
+MOV reg16,mem [rm: o16 8b /r] 8086,SM
+MOV reg16,reg16 [rm: o16 8b /r] 8086
+MOV reg32,mem [rm: o32 8b /r] 386,SM
+MOV reg32,reg32 [rm: o32 8b /r] 386
+MOV reg64,mem [rm: o64 8b /r] X64,SM
+MOV reg64,reg64 [rm: o64 8b /r] X64
+MOV reg8,imm [ri: b0+r ib] 8086,SM
+MOV reg16,imm [ri: o16 b8+r iw] 8086,SM
+MOV reg32,imm [ri: o32 b8+r id] 386,SM
+MOV reg64,udword [ri: o64nw b8+r id] X64,SM,OPT,ND
+MOV reg64,sdword [mi: o64 c7 /0 id,s] X64,SM,OPT,ND
+MOV reg64,imm [ri: o64 b8+r iq] X64,SM
+MOV rm8,imm [mi: hlexr c6 /0 ib] 8086,SM
+MOV rm16,imm [mi: hlexr o16 c7 /0 iw] 8086,SM
+MOV rm32,imm [mi: hlexr o32 c7 /0 id] 386,SM
+MOV rm64,imm [mi: hlexr o64 c7 /0 id,s] X64,SM
+MOV rm64,imm32 [mi: hlexr o64 c7 /0 id,s] X64
+MOV mem,imm8 [mi: hlexr c6 /0 ib] 8086,SM
+MOV mem,imm16 [mi: hlexr o16 c7 /0 iw] 8086,SM
+MOV mem,imm32 [mi: hlexr o32 c7 /0 id] 386,SM
+MOVD mmxreg,rm32 [rm: np 0f 6e /r] PENT,MMX,SD
+MOVD rm32,mmxreg [mr: np 0f 7e /r] PENT,MMX,SD
+MOVD mmxreg,rm64 [rm: np o64 0f 6e /r] X64,MMX,SX,ND
+MOVD rm64,mmxreg [mr: np o64 0f 7e /r] X64,MMX,SX,ND
+MOVQ mmxreg,mmxrm [rm: np 0f 6f /r] PENT,MMX,SQ
+MOVQ mmxrm,mmxreg [mr: np 0f 7f /r] PENT,MMX,SQ
+MOVQ mmxreg,rm64 [rm: np o64 0f 6e /r] X64,MMX
+MOVQ rm64,mmxreg [mr: np o64 0f 7e /r] X64,MMX
+MOVSB void [ a4] 8086
+MOVSD void [ o32 a5] 386
+MOVSQ void [ o64 a5] X64
+MOVSW void [ o16 a5] 8086
+MOVSX reg16,mem [rm: o16 0f be /r] 386,SB
+MOVSX reg16,reg8 [rm: o16 0f be /r] 386
+MOVSX reg32,rm8 [rm: o32 0f be /r] 386
+MOVSX reg32,rm16 [rm: o32 0f bf /r] 386
+MOVSX reg64,rm8 [rm: o64 0f be /r] X64
+MOVSX reg64,rm16 [rm: o64 0f bf /r] X64
+MOVSXD reg64,rm32 [rm: o64 63 /r] X64
+MOVSX reg64,rm32 [rm: o64 63 /r] X64,ND
+MOVZX reg16,mem [rm: o16 0f b6 /r] 386,SB
+MOVZX reg16,reg8 [rm: o16 0f b6 /r] 386
+MOVZX reg32,rm8 [rm: o32 0f b6 /r] 386
+MOVZX reg32,rm16 [rm: o32 0f b7 /r] 386
+MOVZX reg64,rm8 [rm: o64 0f b6 /r] X64
+MOVZX reg64,rm16 [rm: o64 0f b7 /r] X64
+MUL rm8 [m: f6 /4] 8086
+MUL rm16 [m: o16 f7 /4] 8086
+MUL rm32 [m: o32 f7 /4] 386
+MUL rm64 [m: o64 f7 /4] X64
+MWAIT void [ 0f 01 c9] PRESCOTT
+MWAIT reg_eax,reg_ecx [--: 0f 01 c9] PRESCOTT,ND
+MWAITX void [ 0f 01 fb] AMD
+MWAITX reg_eax,reg_ecx [--: 0f 01 fb] AMD,ND
+NEG rm8 [m: hle f6 /3] 8086,LOCK
+NEG rm16 [m: hle o16 f7 /3] 8086,LOCK
+NEG rm32 [m: hle o32 f7 /3] 386,LOCK
+NEG rm64 [m: hle o64 f7 /3] X64,LOCK
+NOP void [ norexb nof3 90] 8086
+NOP rm16 [m: o16 0f 1f /0] P6
+NOP rm32 [m: o32 0f 1f /0] P6
+NOP rm64 [m: o64 0f 1f /0] X64
+NOT rm8 [m: hle f6 /2] 8086,LOCK
+NOT rm16 [m: hle o16 f7 /2] 8086,LOCK
+NOT rm32 [m: hle o32 f7 /2] 386,LOCK
+NOT rm64 [m: hle o64 f7 /2] X64,LOCK
+OR mem,reg8 [mr: hle 08 /r] 8086,SM,LOCK
+OR reg8,reg8 [mr: 08 /r] 8086
+OR mem,reg16 [mr: hle o16 09 /r] 8086,SM,LOCK
+OR reg16,reg16 [mr: o16 09 /r] 8086
+OR mem,reg32 [mr: hle o32 09 /r] 386,SM,LOCK
+OR reg32,reg32 [mr: o32 09 /r] 386
+OR mem,reg64 [mr: hle o64 09 /r] X64,SM,LOCK
+OR reg64,reg64 [mr: o64 09 /r] X64
+OR reg8,mem [rm: 0a /r] 8086,SM
+OR reg8,reg8 [rm: 0a /r] 8086
+OR reg16,mem [rm: o16 0b /r] 8086,SM
+OR reg16,reg16 [rm: o16 0b /r] 8086
+OR reg32,mem [rm: o32 0b /r] 386,SM
+OR reg32,reg32 [rm: o32 0b /r] 386
+OR reg64,mem [rm: o64 0b /r] X64,SM
+OR reg64,reg64 [rm: o64 0b /r] X64
+OR rm16,imm8 [mi: hle o16 83 /1 ib,s] 8086,LOCK
+OR rm32,imm8 [mi: hle o32 83 /1 ib,s] 386,LOCK
+OR rm64,imm8 [mi: hle o64 83 /1 ib,s] X64,LOCK
+OR reg_al,imm [-i: 0c ib] 8086,SM
+OR reg_ax,sbyteword [mi: o16 83 /1 ib,s] 8086,SM,ND
+OR reg_ax,imm [-i: o16 0d iw] 8086,SM
+OR reg_eax,sbytedword [mi: o32 83 /1 ib,s] 386,SM,ND
+OR reg_eax,imm [-i: o32 0d id] 386,SM
+OR reg_rax,sbytedword [mi: o64 83 /1 ib,s] X64,SM,ND
+OR reg_rax,imm [-i: o64 0d id,s] X64,SM
+OR rm8,imm [mi: hle 80 /1 ib] 8086,SM,LOCK
+OR rm16,sbyteword [mi: hle o16 83 /1 ib,s] 8086,SM,LOCK,ND
+OR rm16,imm [mi: hle o16 81 /1 iw] 8086,SM,LOCK
+OR rm32,sbytedword [mi: hle o32 83 /1 ib,s] 386,SM,LOCK,ND
+OR rm32,imm [mi: hle o32 81 /1 id] 386,SM,LOCK
+OR rm64,sbytedword [mi: hle o64 83 /1 ib,s] X64,SM,LOCK,ND
+OR rm64,imm [mi: hle o64 81 /1 id,s] X64,SM,LOCK
+OR mem,imm8 [mi: hle 80 /1 ib] 8086,SM,LOCK
+OR mem,sbyteword16 [mi: hle o16 83 /1 ib,s] 8086,SM,LOCK,ND
+OR mem,imm16 [mi: hle o16 81 /1 iw] 8086,SM,LOCK
+OR mem,sbytedword32 [mi: hle o32 83 /1 ib,s] 386,SM,LOCK,ND
+OR mem,imm32 [mi: hle o32 81 /1 id] 386,SM,LOCK
+OR rm8,imm [mi: hle 82 /1 ib] 8086,SM,LOCK,ND,NOLONG
+OUT imm,reg_al [i-: e6 ib,u] 8086,SB
+OUT imm,reg_ax [i-: o16 e7 ib,u] 8086,SB
+OUT imm,reg_eax [i-: o32 e7 ib,u] 386,SB
+OUT reg_dx,reg_al [--: ee] 8086
+OUT reg_dx,reg_ax [--: o16 ef] 8086
+OUT reg_dx,reg_eax [--: o32 ef] 386
+OUTSB void [ 6e] 186
+OUTSD void [ o32 6f] 386
+OUTSW void [ o16 6f] 186
+PACKSSDW mmxreg,mmxrm [rm: np o64nw 0f 6b /r] PENT,MMX,SQ
+PACKSSWB mmxreg,mmxrm [rm: np o64nw 0f 63 /r] PENT,MMX,SQ
+PACKUSWB mmxreg,mmxrm [rm: np o64nw 0f 67 /r] PENT,MMX,SQ
+PADDB mmxreg,mmxrm [rm: np o64nw 0f fc /r] PENT,MMX,SQ
+PADDD mmxreg,mmxrm [rm: np o64nw 0f fe /r] PENT,MMX,SQ
+PADDSB mmxreg,mmxrm [rm: np o64nw 0f ec /r] PENT,MMX,SQ
+PADDSIW mmxreg,mmxrm [rm: o64nw 0f 51 /r] PENT,MMX,SQ,CYRIX
+PADDSW mmxreg,mmxrm [rm: np o64nw 0f ed /r] PENT,MMX,SQ
+PADDUSB mmxreg,mmxrm [rm: np o64nw 0f dc /r] PENT,MMX,SQ
+PADDUSW mmxreg,mmxrm [rm: np o64nw 0f dd /r] PENT,MMX,SQ
+PADDW mmxreg,mmxrm [rm: np o64nw 0f fd /r] PENT,MMX,SQ
+PAND mmxreg,mmxrm [rm: np o64nw 0f db /r] PENT,MMX,SQ
+PANDN mmxreg,mmxrm [rm: np o64nw 0f df /r] PENT,MMX,SQ
+PAUSE void [ f3i 90] 8086
+PAVEB mmxreg,mmxrm [rm: o64nw 0f 50 /r] PENT,MMX,SQ,CYRIX
+PAVGUSB mmxreg,mmxrm [rm: o64nw 0f 0f /r bf] PENT,3DNOW,SQ
+PCMPEQB mmxreg,mmxrm [rm: np o64nw 0f 74 /r] PENT,MMX,SQ
+PCMPEQD mmxreg,mmxrm [rm: np o64nw 0f 76 /r] PENT,MMX,SQ
+PCMPEQW mmxreg,mmxrm [rm: np o64nw 0f 75 /r] PENT,MMX,SQ
+PCMPGTB mmxreg,mmxrm [rm: np o64nw 0f 64 /r] PENT,MMX,SQ
+PCMPGTD mmxreg,mmxrm [rm: np o64nw 0f 66 /r] PENT,MMX,SQ
+PCMPGTW mmxreg,mmxrm [rm: np o64nw 0f 65 /r] PENT,MMX,SQ
+PDISTIB mmxreg,mem [rm: 0f 54 /r] PENT,MMX,SM,CYRIX
+PF2ID mmxreg,mmxrm [rm: o64nw 0f 0f /r 1d] PENT,3DNOW,SQ
+PFACC mmxreg,mmxrm [rm: o64nw 0f 0f /r ae] PENT,3DNOW,SQ
+PFADD mmxreg,mmxrm [rm: o64nw 0f 0f /r 9e] PENT,3DNOW,SQ
+PFCMPEQ mmxreg,mmxrm [rm: o64nw 0f 0f /r b0] PENT,3DNOW,SQ
+PFCMPGE mmxreg,mmxrm [rm: o64nw 0f 0f /r 90] PENT,3DNOW,SQ
+PFCMPGT mmxreg,mmxrm [rm: o64nw 0f 0f /r a0] PENT,3DNOW,SQ
+PFMAX mmxreg,mmxrm [rm: o64nw 0f 0f /r a4] PENT,3DNOW,SQ
+PFMIN mmxreg,mmxrm [rm: o64nw 0f 0f /r 94] PENT,3DNOW,SQ
+PFMUL mmxreg,mmxrm [rm: o64nw 0f 0f /r b4] PENT,3DNOW,SQ
+PFRCP mmxreg,mmxrm [rm: o64nw 0f 0f /r 96] PENT,3DNOW,SQ
+PFRCPIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a6] PENT,3DNOW,SQ
+PFRCPIT2 mmxreg,mmxrm [rm: o64nw 0f 0f /r b6] PENT,3DNOW,SQ
+PFRSQIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a7] PENT,3DNOW,SQ
+PFRSQRT mmxreg,mmxrm [rm: o64nw 0f 0f /r 97] PENT,3DNOW,SQ
+PFSUB mmxreg,mmxrm [rm: o64nw 0f 0f /r 9a] PENT,3DNOW,SQ
+PFSUBR mmxreg,mmxrm [rm: o64nw 0f 0f /r aa] PENT,3DNOW,SQ
+PI2FD mmxreg,mmxrm [rm: o64nw 0f 0f /r 0d] PENT,3DNOW,SQ
+PMACHRIW mmxreg,mem [rm: 0f 5e /r] PENT,MMX,SM,CYRIX
+PMADDWD mmxreg,mmxrm [rm: np o64nw 0f f5 /r] PENT,MMX,SQ
+PMAGW mmxreg,mmxrm [rm: o64nw 0f 52 /r] PENT,MMX,SQ,CYRIX
+PMULHRIW mmxreg,mmxrm [rm: o64nw 0f 5d /r] PENT,MMX,SQ,CYRIX
+PMULHRWA mmxreg,mmxrm [rm: o64nw 0f 0f /r b7] PENT,3DNOW,SQ
+PMULHRWC mmxreg,mmxrm [rm: o64nw 0f 59 /r] PENT,MMX,SQ,CYRIX
+PMULHW mmxreg,mmxrm [rm: np o64nw 0f e5 /r] PENT,MMX,SQ
+PMULLW mmxreg,mmxrm [rm: np o64nw 0f d5 /r] PENT,MMX,SQ
+PMVGEZB mmxreg,mem [rm: 0f 5c /r] PENT,MMX,SQ,CYRIX
+PMVLZB mmxreg,mem [rm: 0f 5b /r] PENT,MMX,SQ,CYRIX
+PMVNZB mmxreg,mem [rm: 0f 5a /r] PENT,MMX,SQ,CYRIX
+PMVZB mmxreg,mem [rm: 0f 58 /r] PENT,MMX,SQ,CYRIX
+POP reg16 [r: o16 58+r] 8086
+POP reg32 [r: o32 58+r] 386,NOLONG
+POP reg64 [r: o64nw 58+r] X64
+POP rm16 [m: o16 8f /0] 8086
+POP rm32 [m: o32 8f /0] 386,NOLONG
+POP rm64 [m: o64nw 8f /0] X64
+POP reg_es [-: 07] 8086,NOLONG
+POP reg_cs [-: 0f] 8086,UNDOC,ND,OBSOLETE
+POP reg_ss [-: 17] 8086,NOLONG
+POP reg_ds [-: 1f] 8086,NOLONG
+POP reg_fs [-: 0f a1] 386
+POP reg_gs [-: 0f a9] 386
+POPA void [ odf 61] 186,NOLONG
+POPAD void [ o32 61] 386,NOLONG
+POPAW void [ o16 61] 186,NOLONG
+POPF void [ odf 9d] 8086
+POPFD void [ o32 9d] 386,NOLONG
+POPFQ void [ o32 9d] X64
+POPFW void [ o16 9d] 8086
+POR mmxreg,mmxrm [rm: np o64nw 0f eb /r] PENT,MMX,SQ
+PREFETCH mem [m: 0f 0d /0] PENT,3DNOW,SQ
+PREFETCHW mem [m: 0f 0d /1] PENT,3DNOW,SQ
+PSLLD mmxreg,mmxrm [rm: np o64nw 0f f2 /r] PENT,MMX,SQ
+PSLLD mmxreg,imm [mi: np 0f 72 /6 ib,u] PENT,MMX
+PSLLQ mmxreg,mmxrm [rm: np o64nw 0f f3 /r] PENT,MMX,SQ
+PSLLQ mmxreg,imm [mi: np 0f 73 /6 ib,u] PENT,MMX
+PSLLW mmxreg,mmxrm [rm: np o64nw 0f f1 /r] PENT,MMX,SQ
+PSLLW mmxreg,imm [mi: np 0f 71 /6 ib,u] PENT,MMX
+PSRAD mmxreg,mmxrm [rm: np o64nw 0f e2 /r] PENT,MMX,SQ
+PSRAD mmxreg,imm [mi: np 0f 72 /4 ib,u] PENT,MMX
+PSRAW mmxreg,mmxrm [rm: np o64nw 0f e1 /r] PENT,MMX,SQ
+PSRAW mmxreg,imm [mi: np 0f 71 /4 ib,u] PENT,MMX
+PSRLD mmxreg,mmxrm [rm: np o64nw 0f d2 /r] PENT,MMX,SQ
+PSRLD mmxreg,imm [mi: np 0f 72 /2 ib,u] PENT,MMX
+PSRLQ mmxreg,mmxrm [rm: np o64nw 0f d3 /r] PENT,MMX,SQ
+PSRLQ mmxreg,imm [mi: np 0f 73 /2 ib,u] PENT,MMX
+PSRLW mmxreg,mmxrm [rm: np o64nw 0f d1 /r] PENT,MMX,SQ
+PSRLW mmxreg,imm [mi: np 0f 71 /2 ib,u] PENT,MMX
+PSUBB mmxreg,mmxrm [rm: np o64nw 0f f8 /r] PENT,MMX,SQ
+PSUBD mmxreg,mmxrm [rm: np o64nw 0f fa /r] PENT,MMX,SQ
+PSUBSB mmxreg,mmxrm [rm: np o64nw 0f e8 /r] PENT,MMX,SQ
+PSUBSIW mmxreg,mmxrm [rm: o64nw 0f 55 /r] PENT,MMX,SQ,CYRIX
+PSUBSW mmxreg,mmxrm [rm: np o64nw 0f e9 /r] PENT,MMX,SQ
+PSUBUSB mmxreg,mmxrm [rm: np o64nw 0f d8 /r] PENT,MMX,SQ
+PSUBUSW mmxreg,mmxrm [rm: np o64nw 0f d9 /r] PENT,MMX,SQ
+PSUBW mmxreg,mmxrm [rm: np o64nw 0f f9 /r] PENT,MMX,SQ
+PUNPCKHBW mmxreg,mmxrm [rm: np o64nw 0f 68 /r] PENT,MMX,SQ
+PUNPCKHDQ mmxreg,mmxrm [rm: np o64nw 0f 6a /r] PENT,MMX,SQ
+PUNPCKHWD mmxreg,mmxrm [rm: np o64nw 0f 69 /r] PENT,MMX,SQ
+PUNPCKLBW mmxreg,mmxrm [rm: np o64nw 0f 60 /r] PENT,MMX,SQ
+PUNPCKLDQ mmxreg,mmxrm [rm: np o64nw 0f 62 /r] PENT,MMX,SQ
+PUNPCKLWD mmxreg,mmxrm [rm: np o64nw 0f 61 /r] PENT,MMX,SQ
+PUSH reg16 [r: o16 50+r] 8086
+PUSH reg32 [r: o32 50+r] 386,NOLONG
+PUSH reg64 [r: o64nw 50+r] X64
+PUSH rm16 [m: o16 ff /6] 8086
+PUSH rm32 [m: o32 ff /6] 386,NOLONG
+PUSH rm64 [m: o64nw ff /6] X64
+PUSH reg_es [-: 06] 8086,NOLONG
+PUSH reg_cs [-: 0e] 8086,NOLONG
+PUSH reg_ss [-: 16] 8086,NOLONG
+PUSH reg_ds [-: 1e] 8086,NOLONG
+PUSH reg_fs [-: 0f a0] 386
+PUSH reg_gs [-: 0f a8] 386
+PUSH imm8 [i: 6a ib,s] 186
+PUSH sbyteword16 [i: o16 6a ib,s] 186,AR0,SIZE,ND
+PUSH imm16 [i: o16 68 iw] 186,AR0,SIZE
+PUSH sbytedword32 [i: o32 6a ib,s] 386,NOLONG,AR0,SIZE,ND
+PUSH imm32 [i: o32 68 id] 386,NOLONG,AR0,SIZE
+PUSH sbytedword32 [i: o32 6a ib,s] 386,NOLONG,SD,ND
+PUSH imm32 [i: o32 68 id] 386,NOLONG,SD
+PUSH sbytedword64 [i: o64nw 6a ib,s] X64,AR0,SIZE,ND
+PUSH imm64 [i: o64nw 68 id,s] X64,AR0,SIZE
+PUSH sbytedword32 [i: o64nw 6a ib,s] X64,AR0,SIZE,ND
+PUSH imm32 [i: o64nw 68 id,s] X64,AR0,SIZE
+PUSHA void [ odf 60] 186,NOLONG
+PUSHAD void [ o32 60] 386,NOLONG
+PUSHAW void [ o16 60] 186,NOLONG
+PUSHF void [ odf 9c] 8086
+PUSHFD void [ o32 9c] 386,NOLONG
+PUSHFQ void [ o32 9c] X64
+PUSHFW void [ o16 9c] 8086
+PXOR mmxreg,mmxrm [rm: np o64nw 0f ef /r] PENT,MMX,SQ
+RCL rm8,unity [m-: d0 /2] 8086
+RCL rm8,reg_cl [m-: d2 /2] 8086
+RCL rm8,imm8 [mi: c0 /2 ib,u] 186
+RCL rm16,unity [m-: o16 d1 /2] 8086
+RCL rm16,reg_cl [m-: o16 d3 /2] 8086
+RCL rm16,imm8 [mi: o16 c1 /2 ib,u] 186
+RCL rm32,unity [m-: o32 d1 /2] 386
+RCL rm32,reg_cl [m-: o32 d3 /2] 386
+RCL rm32,imm8 [mi: o32 c1 /2 ib,u] 386
+RCL rm64,unity [m-: o64 d1 /2] X64
+RCL rm64,reg_cl [m-: o64 d3 /2] X64
+RCL rm64,imm8 [mi: o64 c1 /2 ib,u] X64
+RCR rm8,unity [m-: d0 /3] 8086
+RCR rm8,reg_cl [m-: d2 /3] 8086
+RCR rm8,imm8 [mi: c0 /3 ib,u] 186
+RCR rm16,unity [m-: o16 d1 /3] 8086
+RCR rm16,reg_cl [m-: o16 d3 /3] 8086
+RCR rm16,imm8 [mi: o16 c1 /3 ib,u] 186
+RCR rm32,unity [m-: o32 d1 /3] 386
+RCR rm32,reg_cl [m-: o32 d3 /3] 386
+RCR rm32,imm8 [mi: o32 c1 /3 ib,u] 386
+RCR rm64,unity [m-: o64 d1 /3] X64
+RCR rm64,reg_cl [m-: o64 d3 /3] X64
+RCR rm64,imm8 [mi: o64 c1 /3 ib,u] X64
+RDSHR rm32 [m: o32 0f 36 /0] P6,CYRIX,SMM
+RDMSR void [ 0f 32] PENT,PRIV
+RDPMC void [ 0f 33] P6
+RDTSC void [ 0f 31] PENT
+RDTSCP void [ 0f 01 f9] X86_64
+RET void [ c3] 8086,BND
+RET imm [i: c2 iw] 8086,SW,BND
+RETF void [ cb] 8086
+RETF imm [i: ca iw] 8086,SW
+RETN void [ c3] 8086,BND
+RETN imm [i: c2 iw] 8086,SW,BND
+
+ROL rm8,unity [m-: d0 /0] 8086
+ROL rm8,reg_cl [m-: d2 /0] 8086
+ROL rm8,imm8 [mi: c0 /0 ib,u] 186
+ROL rm16,unity [m-: o16 d1 /0] 8086
+ROL rm16,reg_cl [m-: o16 d3 /0] 8086
+ROL rm16,imm8 [mi: o16 c1 /0 ib,u] 186
+ROL rm32,unity [m-: o32 d1 /0] 386
+ROL rm32,reg_cl [m-: o32 d3 /0] 386
+ROL rm32,imm8 [mi: o32 c1 /0 ib,u] 386
+ROL rm64,unity [m-: o64 d1 /0] X64
+ROL rm64,reg_cl [m-: o64 d3 /0] X64
+ROL rm64,imm8 [mi: o64 c1 /0 ib,u] X64
+ROR rm8,unity [m-: d0 /1] 8086
+ROR rm8,reg_cl [m-: d2 /1] 8086
+ROR rm8,imm8 [mi: c0 /1 ib,u] 186
+ROR rm16,unity [m-: o16 d1 /1] 8086
+ROR rm16,reg_cl [m-: o16 d3 /1] 8086
+ROR rm16,imm8 [mi: o16 c1 /1 ib,u] 186
+ROR rm32,unity [m-: o32 d1 /1] 386
+ROR rm32,reg_cl [m-: o32 d3 /1] 386
+ROR rm32,imm8 [mi: o32 c1 /1 ib,u] 386
+ROR rm64,unity [m-: o64 d1 /1] X64
+ROR rm64,reg_cl [m-: o64 d3 /1] X64
+ROR rm64,imm8 [mi: o64 c1 /1 ib,u] X64
+RDM void [ 0f 3a] P6,CYRIX,ND
+RSDC reg_sreg,mem80 [rm: 0f 79 /r] 486,CYRIX,SMM
+RSLDT mem80 [m: 0f 7b /0] 486,CYRIX,SMM
+RSM void [ 0f aa] PENT,SMM
+RSTS mem80 [m: 0f 7d /0] 486,CYRIX,SMM
+SAHF void [ 9e] 8086
+SAL rm8,unity [m-: d0 /4] 8086,ND
+SAL rm8,reg_cl [m-: d2 /4] 8086,ND
+SAL rm8,imm8 [mi: c0 /4 ib,u] 186,ND
+SAL rm16,unity [m-: o16 d1 /4] 8086,ND
+SAL rm16,reg_cl [m-: o16 d3 /4] 8086,ND
+SAL rm16,imm8 [mi: o16 c1 /4 ib,u] 186,ND
+SAL rm32,unity [m-: o32 d1 /4] 386,ND
+SAL rm32,reg_cl [m-: o32 d3 /4] 386,ND
+SAL rm32,imm8 [mi: o32 c1 /4 ib,u] 386,ND
+SAL rm64,unity [m-: o64 d1 /4] X64,ND
+SAL rm64,reg_cl [m-: o64 d3 /4] X64,ND
+SAL rm64,imm8 [mi: o64 c1 /4 ib,u] X64,ND
+SALC void [ d6] 8086,UNDOC
+SAR rm8,unity [m-: d0 /7] 8086
+SAR rm8,reg_cl [m-: d2 /7] 8086
+SAR rm8,imm8 [mi: c0 /7 ib,u] 186
+SAR rm16,unity [m-: o16 d1 /7] 8086
+SAR rm16,reg_cl [m-: o16 d3 /7] 8086
+SAR rm16,imm8 [mi: o16 c1 /7 ib,u] 186
+SAR rm32,unity [m-: o32 d1 /7] 386
+SAR rm32,reg_cl [m-: o32 d3 /7] 386
+SAR rm32,imm8 [mi: o32 c1 /7 ib,u] 386
+SAR rm64,unity [m-: o64 d1 /7] X64
+SAR rm64,reg_cl [m-: o64 d3 /7] X64
+SAR rm64,imm8 [mi: o64 c1 /7 ib,u] X64
+SBB mem,reg8 [mr: hle 18 /r] 8086,SM,LOCK
+SBB reg8,reg8 [mr: 18 /r] 8086
+SBB mem,reg16 [mr: hle o16 19 /r] 8086,SM,LOCK
+SBB reg16,reg16 [mr: o16 19 /r] 8086
+SBB mem,reg32 [mr: hle o32 19 /r] 386,SM,LOCK
+SBB reg32,reg32 [mr: o32 19 /r] 386
+SBB mem,reg64 [mr: hle o64 19 /r] X64,SM,LOCK
+SBB reg64,reg64 [mr: o64 19 /r] X64
+SBB reg8,mem [rm: 1a /r] 8086,SM
+SBB reg8,reg8 [rm: 1a /r] 8086
+SBB reg16,mem [rm: o16 1b /r] 8086,SM
+SBB reg16,reg16 [rm: o16 1b /r] 8086
+SBB reg32,mem [rm: o32 1b /r] 386,SM
+SBB reg32,reg32 [rm: o32 1b /r] 386
+SBB reg64,mem [rm: o64 1b /r] X64,SM
+SBB reg64,reg64 [rm: o64 1b /r] X64
+SBB rm16,imm8 [mi: hle o16 83 /3 ib,s] 8086,LOCK
+SBB rm32,imm8 [mi: hle o32 83 /3 ib,s] 386,LOCK
+SBB rm64,imm8 [mi: hle o64 83 /3 ib,s] X64,LOCK
+SBB reg_al,imm [-i: 1c ib] 8086,SM
+SBB reg_ax,sbyteword [mi: o16 83 /3 ib,s] 8086,SM,ND
+SBB reg_ax,imm [-i: o16 1d iw] 8086,SM
+SBB reg_eax,sbytedword [mi: o32 83 /3 ib,s] 386,SM,ND
+SBB reg_eax,imm [-i: o32 1d id] 386,SM
+SBB reg_rax,sbytedword [mi: o64 83 /3 ib,s] X64,SM,ND
+SBB reg_rax,imm [-i: o64 1d id,s] X64,SM
+SBB rm8,imm [mi: hle 80 /3 ib] 8086,SM,LOCK
+SBB rm16,sbyteword [mi: hle o16 83 /3 ib,s] 8086,SM,LOCK,ND
+SBB rm16,imm [mi: hle o16 81 /3 iw] 8086,SM,LOCK
+SBB rm32,sbytedword [mi: hle o32 83 /3 ib,s] 386,SM,LOCK,ND
+SBB rm32,imm [mi: hle o32 81 /3 id] 386,SM,LOCK
+SBB rm64,sbytedword [mi: hle o64 83 /3 ib,s] X64,SM,LOCK,ND
+SBB rm64,imm [mi: hle o64 81 /3 id,s] X64,SM,LOCK
+SBB mem,imm8 [mi: hle 80 /3 ib] 8086,SM,LOCK
+SBB mem,sbyteword16 [mi: hle o16 83 /3 ib,s] 8086,SM,LOCK,ND
+SBB mem,imm16 [mi: hle o16 81 /3 iw] 8086,SM,LOCK
+SBB mem,sbytedword32 [mi: hle o32 83 /3 ib,s] 386,SM,LOCK,ND
+SBB mem,imm32 [mi: hle o32 81 /3 id] 386,SM,LOCK
+SBB rm8,imm [mi: hle 82 /3 ib] 8086,SM,LOCK,ND,NOLONG
+SCASB void [ repe ae] 8086
+SCASD void [ repe o32 af] 386
+SCASQ void [ repe o64 af] X64
+SCASW void [ repe o16 af] 8086
+SFENCE void [ np 0f ae f8] X64,AMD
+SGDT mem [m: 0f 01 /0] 286
+SHL rm8,unity [m-: d0 /4] 8086
+SHL rm8,reg_cl [m-: d2 /4] 8086
+SHL rm8,imm8 [mi: c0 /4 ib,u] 186
+SHL rm16,unity [m-: o16 d1 /4] 8086
+SHL rm16,reg_cl [m-: o16 d3 /4] 8086
+SHL rm16,imm8 [mi: o16 c1 /4 ib,u] 186
+SHL rm32,unity [m-: o32 d1 /4] 386
+SHL rm32,reg_cl [m-: o32 d3 /4] 386
+SHL rm32,imm8 [mi: o32 c1 /4 ib,u] 386
+SHL rm64,unity [m-: o64 d1 /4] X64
+SHL rm64,reg_cl [m-: o64 d3 /4] X64
+SHL rm64,imm8 [mi: o64 c1 /4 ib,u] X64
+SHLD mem,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD reg16,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD mem,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD reg32,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD mem,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
+SHLD reg64,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
+SHLD mem,reg16,reg_cl [mr-: o16 0f a5 /r] 386,SM
+SHLD reg16,reg16,reg_cl [mr-: o16 0f a5 /r] 386
+SHLD mem,reg32,reg_cl [mr-: o32 0f a5 /r] 386,SM
+SHLD reg32,reg32,reg_cl [mr-: o32 0f a5 /r] 386
+SHLD mem,reg64,reg_cl [mr-: o64 0f a5 /r] X64,SM
+SHLD reg64,reg64,reg_cl [mr-: o64 0f a5 /r] X64
+SHR rm8,unity [m-: d0 /5] 8086
+SHR rm8,reg_cl [m-: d2 /5] 8086
+SHR rm8,imm8 [mi: c0 /5 ib,u] 186
+SHR rm16,unity [m-: o16 d1 /5] 8086
+SHR rm16,reg_cl [m-: o16 d3 /5] 8086
+SHR rm16,imm8 [mi: o16 c1 /5 ib,u] 186
+SHR rm32,unity [m-: o32 d1 /5] 386
+SHR rm32,reg_cl [m-: o32 d3 /5] 386
+SHR rm32,imm8 [mi: o32 c1 /5 ib,u] 386
+SHR rm64,unity [m-: o64 d1 /5] X64
+SHR rm64,reg_cl [m-: o64 d3 /5] X64
+SHR rm64,imm8 [mi: o64 c1 /5 ib,u] X64
+SHRD mem,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD reg16,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD mem,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD reg32,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD mem,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
+SHRD reg64,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
+SHRD mem,reg16,reg_cl [mr-: o16 0f ad /r] 386,SM
+SHRD reg16,reg16,reg_cl [mr-: o16 0f ad /r] 386
+SHRD mem,reg32,reg_cl [mr-: o32 0f ad /r] 386,SM
+SHRD reg32,reg32,reg_cl [mr-: o32 0f ad /r] 386
+SHRD mem,reg64,reg_cl [mr-: o64 0f ad /r] X64,SM
+SHRD reg64,reg64,reg_cl [mr-: o64 0f ad /r] X64
+SIDT mem [m: 0f 01 /1] 286
+SLDT mem [m: 0f 00 /0] 286
+SLDT mem16 [m: 0f 00 /0] 286
+SLDT reg16 [m: o16 0f 00 /0] 286
+SLDT reg32 [m: o32 0f 00 /0] 386
+SLDT reg64 [m: o64nw 0f 00 /0] X64,ND
+SLDT reg64 [m: o64 0f 00 /0] X64
+SKINIT void [ 0f 01 de] X64
+SMI void [ f1] 386,UNDOC
+SMINT void [ 0f 38] P6,CYRIX,ND
+; Older Cyrix chips had this; they had to move due to conflict with MMX
+SMINTOLD void [ 0f 7e] 486,CYRIX,ND,OBSOLETE
+SMSW mem [m: 0f 01 /4] 286
+SMSW mem16 [m: 0f 01 /4] 286
+SMSW reg16 [m: o16 0f 01 /4] 286
+SMSW reg32 [m: o32 0f 01 /4] 386
+SMSW reg64 [m: o64 0f 01 /4] X64
+STC void [ f9] 8086
+STD void [ fd] 8086
+STI void [ fb] 8086
+STOSB void [ aa] 8086
+STOSD void [ o32 ab] 386
+STOSQ void [ o64 ab] X64
+STOSW void [ o16 ab] 8086
+STR mem [m: 0f 00 /1] 286,PROT
+STR mem16 [m: 0f 00 /1] 286,PROT
+STR reg16 [m: o16 0f 00 /1] 286,PROT
+STR reg32 [m: o32 0f 00 /1] 386,PROT
+STR reg64 [m: o64 0f 00 /1] X64
+SUB mem,reg8 [mr: hle 28 /r] 8086,SM,LOCK
+SUB reg8,reg8 [mr: 28 /r] 8086
+SUB mem,reg16 [mr: hle o16 29 /r] 8086,SM,LOCK
+SUB reg16,reg16 [mr: o16 29 /r] 8086
+SUB mem,reg32 [mr: hle o32 29 /r] 386,SM,LOCK
+SUB reg32,reg32 [mr: o32 29 /r] 386
+SUB mem,reg64 [mr: hle o64 29 /r] X64,SM,LOCK
+SUB reg64,reg64 [mr: o64 29 /r] X64
+SUB reg8,mem [rm: 2a /r] 8086,SM
+SUB reg8,reg8 [rm: 2a /r] 8086
+SUB reg16,mem [rm: o16 2b /r] 8086,SM
+SUB reg16,reg16 [rm: o16 2b /r] 8086
+SUB reg32,mem [rm: o32 2b /r] 386,SM
+SUB reg32,reg32 [rm: o32 2b /r] 386
+SUB reg64,mem [rm: o64 2b /r] X64,SM
+SUB reg64,reg64 [rm: o64 2b /r] X64
+SUB rm16,imm8 [mi: hle o16 83 /5 ib,s] 8086,LOCK
+SUB rm32,imm8 [mi: hle o32 83 /5 ib,s] 386,LOCK
+SUB rm64,imm8 [mi: hle o64 83 /5 ib,s] X64,LOCK
+SUB reg_al,imm [-i: 2c ib] 8086,SM
+SUB reg_ax,sbyteword [mi: o16 83 /5 ib,s] 8086,SM,ND
+SUB reg_ax,imm [-i: o16 2d iw] 8086,SM
+SUB reg_eax,sbytedword [mi: o32 83 /5 ib,s] 386,SM,ND
+SUB reg_eax,imm [-i: o32 2d id] 386,SM
+SUB reg_rax,sbytedword [mi: o64 83 /5 ib,s] X64,SM,ND
+SUB reg_rax,imm [-i: o64 2d id,s] X64,SM
+SUB rm8,imm [mi: hle 80 /5 ib] 8086,SM,LOCK
+SUB rm16,sbyteword [mi: hle o16 83 /5 ib,s] 8086,SM,LOCK,ND
+SUB rm16,imm [mi: hle o16 81 /5 iw] 8086,SM,LOCK
+SUB rm32,sbytedword [mi: hle o32 83 /5 ib,s] 386,SM,LOCK,ND
+SUB rm32,imm [mi: hle o32 81 /5 id] 386,SM,LOCK
+SUB rm64,sbytedword [mi: hle o64 83 /5 ib,s] X64,SM,LOCK,ND
+SUB rm64,imm [mi: hle o64 81 /5 id,s] X64,SM,LOCK
+SUB mem,imm8 [mi: hle 80 /5 ib] 8086,SM,LOCK
+SUB mem,sbyteword16 [mi: hle o16 83 /5 ib,s] 8086,SM,LOCK,ND
+SUB mem,imm16 [mi: hle o16 81 /5 iw] 8086,SM,LOCK
+SUB mem,sbytedword32 [mi: hle o32 83 /5 ib,s] 386,SM,LOCK,ND
+SUB mem,imm32 [mi: hle o32 81 /5 id] 386,SM,LOCK
+SUB rm8,imm [mi: hle 82 /5 ib] 8086,SM,LOCK,ND,NOLONG
+SVDC mem80,reg_sreg [mr: 0f 78 /r] 486,CYRIX,SMM
+SVLDT mem80 [m: 0f 7a /0] 486,CYRIX,SMM,ND
+SVTS mem80 [m: 0f 7c /0] 486,CYRIX,SMM
+SWAPGS void [ 0f 01 f8] X64
+SYSCALL void [ 0f 05] P6,AMD
+SYSENTER void [ 0f 34] P6
+SYSEXIT void [ 0f 35] P6,PRIV
+SYSRET void [ 0f 07] P6,PRIV,AMD
+TEST mem,reg8 [mr: 84 /r] 8086,SM
+TEST reg8,reg8 [mr: 84 /r] 8086
+TEST mem,reg16 [mr: o16 85 /r] 8086,SM
+TEST reg16,reg16 [mr: o16 85 /r] 8086
+TEST mem,reg32 [mr: o32 85 /r] 386,SM
+TEST reg32,reg32 [mr: o32 85 /r] 386
+TEST mem,reg64 [mr: o64 85 /r] X64,SM
+TEST reg64,reg64 [mr: o64 85 /r] X64
+TEST reg8,mem [rm: 84 /r] 8086,SM
+TEST reg16,mem [rm: o16 85 /r] 8086,SM
+TEST reg32,mem [rm: o32 85 /r] 386,SM
+TEST reg64,mem [rm: o64 85 /r] X64,SM
+TEST reg_al,imm [-i: a8 ib] 8086,SM
+TEST reg_ax,imm [-i: o16 a9 iw] 8086,SM
+TEST reg_eax,imm [-i: o32 a9 id] 386,SM
+TEST reg_rax,imm [-i: o64 a9 id,s] X64,SM
+TEST rm8,imm [mi: f6 /0 ib] 8086,SM
+TEST rm16,imm [mi: o16 f7 /0 iw] 8086,SM
+TEST rm32,imm [mi: o32 f7 /0 id] 386,SM
+TEST rm64,imm [mi: o64 f7 /0 id,s] X64,SM
+TEST mem,imm8 [mi: f6 /0 ib] 8086,SM
+TEST mem,imm16 [mi: o16 f7 /0 iw] 8086,SM
+TEST mem,imm32 [mi: o32 f7 /0 id] 386,SM
+UD0 void [ 0f ff] 186,UNDOC
+UD1 void [ 0f b9] 186,UNDOC
+UD2B void [ 0f b9] 186,UNDOC,ND
+UD2 void [ 0f 0b] 186
+UD2A void [ 0f 0b] 186,ND
+UMOV mem,reg8 [mr: np 0f 10 /r] 386,UNDOC,SM,ND
+UMOV reg8,reg8 [mr: np 0f 10 /r] 386,UNDOC,ND
+UMOV mem,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,SM,ND
+UMOV reg16,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,ND
+UMOV mem,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,SM,ND
+UMOV reg32,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,ND
+UMOV reg8,mem [rm: np 0f 12 /r] 386,UNDOC,SM,ND
+UMOV reg8,reg8 [rm: np 0f 12 /r] 386,UNDOC,ND
+UMOV reg16,mem [rm: np o16 0f 13 /r] 386,UNDOC,SM,ND
+UMOV reg16,reg16 [rm: np o16 0f 13 /r] 386,UNDOC,ND
+UMOV reg32,mem [rm: np o32 0f 13 /r] 386,UNDOC,SM,ND
+UMOV reg32,reg32 [rm: np o32 0f 13 /r] 386,UNDOC,ND
+VERR mem [m: 0f 00 /4] 286,PROT
+VERR mem16 [m: 0f 00 /4] 286,PROT
+VERR reg16 [m: 0f 00 /4] 286,PROT
+VERW mem [m: 0f 00 /5] 286,PROT
+VERW mem16 [m: 0f 00 /5] 286,PROT
+VERW reg16 [m: 0f 00 /5] 286,PROT
+FWAIT void [ wait] 8086
+WBINVD void [ 0f 09] 486,PRIV
+WRSHR rm32 [m: o32 0f 37 /0] P6,CYRIX,SMM
+WRMSR void [ 0f 30] PENT,PRIV
+XADD mem,reg8 [mr: hle 0f c0 /r] 486,SM,LOCK
+XADD reg8,reg8 [mr: 0f c0 /r] 486
+XADD mem,reg16 [mr: hle o16 0f c1 /r] 486,SM,LOCK
+XADD reg16,reg16 [mr: o16 0f c1 /r] 486
+XADD mem,reg32 [mr: hle o32 0f c1 /r] 486,SM,LOCK
+XADD reg32,reg32 [mr: o32 0f c1 /r] 486
+XADD mem,reg64 [mr: hle o64 0f c1 /r] X64,SM,LOCK
+XADD reg64,reg64 [mr: o64 0f c1 /r] X64
+XBTS reg16,mem [rm: o16 0f a6 /r] 386,SW,UNDOC,ND
+XBTS reg16,reg16 [rm: o16 0f a6 /r] 386,UNDOC,ND
+XBTS reg32,mem [rm: o32 0f a6 /r] 386,SD,UNDOC,ND
+XBTS reg32,reg32 [rm: o32 0f a6 /r] 386,UNDOC,ND
+XCHG reg_ax,reg16 [-r: o16 90+r] 8086
+XCHG reg_eax,reg32na [-r: o32 90+r] 386
+XCHG reg_rax,reg64 [-r: o64 90+r] X64
+XCHG reg16,reg_ax [r-: o16 90+r] 8086
+XCHG reg32na,reg_eax [r-: o32 90+r] 386
+XCHG reg64,reg_rax [r-: o64 90+r] X64
+; This must be NOLONG since opcode 90 is NOP, and in 64-bit mode
+; "xchg eax,eax" is *not* a NOP.
+XCHG reg_eax,reg_eax [--: o32 90] 386,NOLONG
+XCHG reg8,mem [rm: hlenl 86 /r] 8086,SM,LOCK
+XCHG reg8,reg8 [rm: 86 /r] 8086
+XCHG reg16,mem [rm: hlenl o16 87 /r] 8086,SM,LOCK
+XCHG reg16,reg16 [rm: o16 87 /r] 8086
+XCHG reg32,mem [rm: hlenl o32 87 /r] 386,SM,LOCK
+XCHG reg32,reg32 [rm: o32 87 /r] 386
+XCHG reg64,mem [rm: hlenl o64 87 /r] X64,SM,LOCK
+XCHG reg64,reg64 [rm: o64 87 /r] X64
+XCHG mem,reg8 [mr: hlenl 86 /r] 8086,SM,LOCK
+XCHG reg8,reg8 [mr: 86 /r] 8086
+XCHG mem,reg16 [mr: hlenl o16 87 /r] 8086,SM,LOCK
+XCHG reg16,reg16 [mr: o16 87 /r] 8086
+XCHG mem,reg32 [mr: hlenl o32 87 /r] 386,SM,LOCK
+XCHG reg32,reg32 [mr: o32 87 /r] 386
+XCHG mem,reg64 [mr: hlenl o64 87 /r] X64,SM,LOCK
+XCHG reg64,reg64 [mr: o64 87 /r] X64
+XLATB void [ d7] 8086
+XLAT void [ d7] 8086
+XOR mem,reg8 [mr: hle 30 /r] 8086,SM,LOCK
+XOR reg8,reg8 [mr: 30 /r] 8086
+XOR mem,reg16 [mr: hle o16 31 /r] 8086,SM,LOCK
+XOR reg16,reg16 [mr: o16 31 /r] 8086
+XOR mem,reg32 [mr: hle o32 31 /r] 386,SM,LOCK
+XOR reg32,reg32 [mr: o32 31 /r] 386
+XOR mem,reg64 [mr: hle o64 31 /r] X64,SM,LOCK
+XOR reg64,reg64 [mr: o64 31 /r] X64
+XOR reg8,mem [rm: 32 /r] 8086,SM
+XOR reg8,reg8 [rm: 32 /r] 8086
+XOR reg16,mem [rm: o16 33 /r] 8086,SM
+XOR reg16,reg16 [rm: o16 33 /r] 8086
+XOR reg32,mem [rm: o32 33 /r] 386,SM
+XOR reg32,reg32 [rm: o32 33 /r] 386
+XOR reg64,mem [rm: o64 33 /r] X64,SM
+XOR reg64,reg64 [rm: o64 33 /r] X64
+XOR rm16,imm8 [mi: hle o16 83 /6 ib,s] 8086,LOCK
+XOR rm32,imm8 [mi: hle o32 83 /6 ib,s] 386,LOCK
+XOR rm64,imm8 [mi: hle o64 83 /6 ib,s] X64,LOCK
+XOR reg_al,imm [-i: 34 ib] 8086,SM
+XOR reg_ax,sbyteword [mi: o16 83 /6 ib,s] 8086,SM,ND
+XOR reg_ax,imm [-i: o16 35 iw] 8086,SM
+XOR reg_eax,sbytedword [mi: o32 83 /6 ib,s] 386,SM,ND
+XOR reg_eax,imm [-i: o32 35 id] 386,SM
+XOR reg_rax,sbytedword [mi: o64 83 /6 ib,s] X64,SM,ND
+XOR reg_rax,imm [-i: o64 35 id,s] X64,SM
+XOR rm8,imm [mi: hle 80 /6 ib] 8086,SM,LOCK
+XOR rm16,sbyteword [mi: hle o16 83 /6 ib,s] 8086,SM,LOCK,ND
+XOR rm16,imm [mi: hle o16 81 /6 iw] 8086,SM,LOCK
+XOR rm32,sbytedword [mi: hle o32 83 /6 ib,s] 386,SM,LOCK,ND
+XOR rm32,imm [mi: hle o32 81 /6 id] 386,SM,LOCK
+XOR rm64,sbytedword [mi: hle o64 83 /6 ib,s] X64,SM,LOCK,ND
+XOR rm64,imm [mi: hle o64 81 /6 id,s] X64,SM,LOCK
+XOR mem,imm8 [mi: hle 80 /6 ib] 8086,SM,LOCK
+XOR mem,sbyteword16 [mi: hle o16 83 /6 ib,s] 8086,SM,LOCK,ND
+XOR mem,imm16 [mi: hle o16 81 /6 iw] 8086,SM,LOCK
+XOR mem,sbytedword32 [mi: hle o32 83 /6 ib,s] 386,SM,LOCK,ND
+XOR mem,imm32 [mi: hle o32 81 /6 id] 386,SM,LOCK
+XOR rm8,imm [mi: hle 82 /6 ib] 8086,SM,LOCK,ND,NOLONG
+CMOVcc reg16,mem [rm: o16 0f 40+c /r] P6,SM
+CMOVcc reg16,reg16 [rm: o16 0f 40+c /r] P6
+CMOVcc reg32,mem [rm: o32 0f 40+c /r] P6,SM
+CMOVcc reg32,reg32 [rm: o32 0f 40+c /r] P6
+CMOVcc reg64,mem [rm: o64 0f 40+c /r] X64,SM
+CMOVcc reg64,reg64 [rm: o64 0f 40+c /r] X64
+Jcc imm|near [i: odf 0f 80+c rel] 386,BND
+Jcc imm16|near [i: o16 0f 80+c rel] 386,NOLONG,BND
+Jcc imm32|near [i: o32 0f 80+c rel] 386,NOLONG,BND
+Jcc imm64|near [i: o64nw 0f 80+c rel] X64,BND
+Jcc imm|short [i: 70+c rel8] 8086,ND,BND
+Jcc imm [i: jcc8 70+c rel8] 8086,ND,BND
+Jcc imm [i: 0f 80+c rel] 386,ND,BND
+Jcc imm [i: 71+c jlen e9 rel] 8086,ND,BND
+Jcc imm [i: 70+c rel8] 8086,BND
+
+SETcc mem [m: 0f 90+c /0] 386,SB
+SETcc reg8 [m: 0f 90+c /0] 386
+
+;# Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
+ADDPS xmmreg,xmmrm128 [rm: np 0f 58 /r] KATMAI,SSE
+ADDSS xmmreg,xmmrm32 [rm: f3 0f 58 /r] KATMAI,SSE
+ANDNPS xmmreg,xmmrm128 [rm: np 0f 55 /r] KATMAI,SSE
+ANDPS xmmreg,xmmrm128 [rm: np 0f 54 /r] KATMAI,SSE
+CMPEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 00] KATMAI,SSE
+CMPEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 00] KATMAI,SSE
+CMPLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 02] KATMAI,SSE
+CMPLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 02] KATMAI,SSE
+CMPLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 01] KATMAI,SSE
+CMPLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 01] KATMAI,SSE
+CMPNEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 04] KATMAI,SSE
+CMPNEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 04] KATMAI,SSE
+CMPNLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 06] KATMAI,SSE
+CMPNLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 06] KATMAI,SSE
+CMPNLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 05] KATMAI,SSE
+CMPNLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 05] KATMAI,SSE
+CMPORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 07] KATMAI,SSE
+CMPORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 07] KATMAI,SSE
+CMPUNORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 03] KATMAI,SSE
+CMPUNORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 03] KATMAI,SSE
+; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
+; specific ops first and only disassemble illegal ones as cmpps/cmpss.
+CMPPS xmmreg,mem,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPPS xmmreg,xmmreg,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPSS xmmreg,mem,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPSS xmmreg,xmmreg,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+COMISS xmmreg,xmmrm32 [rm: np 0f 2f /r] KATMAI,SSE
+CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] KATMAI,SSE,MMX
+CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] KATMAI,SSE,MMX
+CVTSI2SS xmmreg,mem [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1,ND
+CVTSI2SS xmmreg,rm32 [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1
+CVTSI2SS xmmreg,rm64 [rm: o64 f3 0f 2a /r] X64,SSE,SQ,AR1
+CVTSS2SI reg32,xmmreg [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
+CVTSS2SI reg32,mem [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
+CVTSS2SI reg64,xmmreg [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
+CVTSS2SI reg64,mem [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
+CVTTPS2PI mmxreg,xmmrm [rm: np 0f 2c /r] KATMAI,SSE,MMX,SQ
+CVTTSS2SI reg32,xmmrm [rm: f3 0f 2c /r] KATMAI,SSE,SD,AR1
+CVTTSS2SI reg64,xmmrm [rm: o64 f3 0f 2c /r] X64,SSE,SD,AR1
+DIVPS xmmreg,xmmrm128 [rm: np 0f 5e /r] KATMAI,SSE
+DIVSS xmmreg,xmmrm32 [rm: f3 0f 5e /r] KATMAI,SSE
+LDMXCSR mem32 [m: np 0f ae /2] KATMAI,SSE
+MAXPS xmmreg,xmmrm128 [rm: np 0f 5f /r] KATMAI,SSE
+MAXSS xmmreg,xmmrm32 [rm: f3 0f 5f /r] KATMAI,SSE
+MINPS xmmreg,xmmrm128 [rm: np 0f 5d /r] KATMAI,SSE
+MINSS xmmreg,xmmrm32 [rm: f3 0f 5d /r] KATMAI,SSE
+MOVAPS xmmreg,xmmrm128 [rm: np 0f 28 /r] KATMAI,SSE
+MOVAPS xmmrm128,xmmreg [mr: np 0f 29 /r] KATMAI,SSE
+MOVHPS xmmreg,mem64 [rm: np 0f 16 /r] KATMAI,SSE
+MOVHPS mem64,xmmreg [mr: np 0f 17 /r] KATMAI,SSE
+MOVLHPS xmmreg,xmmreg [rm: np 0f 16 /r] KATMAI,SSE
+MOVLPS xmmreg,mem64 [rm: np 0f 12 /r] KATMAI,SSE
+MOVLPS mem64,xmmreg [mr: np 0f 13 /r] KATMAI,SSE
+MOVHLPS xmmreg,xmmreg [rm: np 0f 12 /r] KATMAI,SSE
+MOVMSKPS reg32,xmmreg [rm: np 0f 50 /r] KATMAI,SSE
+MOVMSKPS reg64,xmmreg [rm: np o64 0f 50 /r] X64,SSE
+MOVNTPS mem128,xmmreg [mr: np 0f 2b /r] KATMAI,SSE
+MOVSS xmmreg,xmmrm32 [rm: f3 0f 10 /r] KATMAI,SSE
+MOVSS mem32,xmmreg [mr: f3 0f 11 /r] KATMAI,SSE
+MOVSS xmmreg,xmmreg [rm: f3 0f 10 /r] KATMAI,SSE
+MOVUPS xmmreg,xmmrm128 [rm: np 0f 10 /r] KATMAI,SSE
+MOVUPS xmmrm128,xmmreg [mr: np 0f 11 /r] KATMAI,SSE
+MULPS xmmreg,xmmrm128 [rm: np 0f 59 /r] KATMAI,SSE
+MULSS xmmreg,xmmrm32 [rm: f3 0f 59 /r] KATMAI,SSE
+ORPS xmmreg,xmmrm128 [rm: np 0f 56 /r] KATMAI,SSE
+RCPPS xmmreg,xmmrm128 [rm: np 0f 53 /r] KATMAI,SSE
+RCPSS xmmreg,xmmrm32 [rm: f3 0f 53 /r] KATMAI,SSE
+RSQRTPS xmmreg,xmmrm128 [rm: np 0f 52 /r] KATMAI,SSE
+RSQRTSS xmmreg,xmmrm32 [rm: f3 0f 52 /r] KATMAI,SSE
+SHUFPS xmmreg,xmmrm128,imm8 [rmi: np 0f c6 /r ib,u] KATMAI,SSE
+SQRTPS xmmreg,xmmrm128 [rm: np 0f 51 /r] KATMAI,SSE
+SQRTSS xmmreg,xmmrm32 [rm: f3 0f 51 /r] KATMAI,SSE
+STMXCSR mem32 [m: np 0f ae /3] KATMAI,SSE
+SUBPS xmmreg,xmmrm128 [rm: np 0f 5c /r] KATMAI,SSE
+SUBSS xmmreg,xmmrm32 [rm: f3 0f 5c /r] KATMAI,SSE
+UCOMISS xmmreg,xmmrm32 [rm: np 0f 2e /r] KATMAI,SSE
+UNPCKHPS xmmreg,xmmrm128 [rm: np 0f 15 /r] KATMAI,SSE
+UNPCKLPS xmmreg,xmmrm128 [rm: np 0f 14 /r] KATMAI,SSE
+XORPS xmmreg,xmmrm128 [rm: np 0f 57 /r] KATMAI,SSE
+
+;# Introduced in Deschutes but necessary for SSE support
+FXRSTOR mem [m: np 0f ae /1] P6,SSE,FPU
+FXRSTOR64 mem [m: o64 np 0f ae /1] X64,SSE,FPU
+FXSAVE mem [m: np 0f ae /0] P6,SSE,FPU
+FXSAVE64 mem [m: o64 np 0f ae /0] X64,SSE,FPU
+
+;# XSAVE group (AVX and extended state)
+; Introduced in late Penryn ... we really need to clean up the handling
+; of CPU feature bits.
+XGETBV void [ 0f 01 d0] NEHALEM
+XSETBV void [ 0f 01 d1] NEHALEM,PRIV
+XSAVE mem [m: np 0f ae /4] NEHALEM
+XSAVE64 mem [m: o64 np 0f ae /4] LONG,NEHALEM
+XSAVEC mem [m: np 0f c7 /4] FUTURE
+XSAVEC64 mem [m: o64 np 0f c7 /4] LONG,FUTURE
+XSAVEOPT mem [m: np 0f ae /6] FUTURE
+XSAVEOPT64 mem [m: o64 np 0f ae /6] LONG,FUTURE
+XSAVES mem [m: np 0f c7 /5] FUTURE
+XSAVES64 mem [m: o64 np 0f c7 /5] LONG,FUTURE
+XRSTOR mem [m: np 0f ae /5] NEHALEM
+XRSTOR64 mem [m: o64 np 0f ae /5] LONG,NEHALEM
+XRSTORS mem [m: np 0f c7 /3] FUTURE
+XRSTORS64 mem [m: o64 np 0f c7 /3] LONG,FUTURE
+
+; These instructions are not SSE-specific; they are
+;# Generic memory operations
+; and work even if CR4.OSFXFR == 0
+PREFETCHNTA mem8 [m: 0f 18 /0] KATMAI
+PREFETCHT0 mem8 [m: 0f 18 /1] KATMAI
+PREFETCHT1 mem8 [m: 0f 18 /2] KATMAI
+PREFETCHT2 mem8 [m: 0f 18 /3] KATMAI
+SFENCE void [ np 0f ae f8] KATMAI
+
+;# New MMX instructions introduced in Katmai
+MASKMOVQ mmxreg,mmxreg [rm: np 0f f7 /r] KATMAI,MMX
+MOVNTQ mem,mmxreg [mr: np 0f e7 /r] KATMAI,MMX,SQ
+PAVGB mmxreg,mmxrm [rm: np o64nw 0f e0 /r] KATMAI,MMX,SQ
+PAVGW mmxreg,mmxrm [rm: np o64nw 0f e3 /r] KATMAI,MMX,SQ
+PEXTRW reg32,mmxreg,imm [rmi: np 0f c5 /r ib,u] KATMAI,MMX,SB,AR2
+; PINSRW is documented as using a reg32, but it's really using only 16 bit
+; -- accept either, but be truthful in disassembly
+PINSRW mmxreg,mem,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PINSRW mmxreg,rm16,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PINSRW mmxreg,reg32,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PMAXSW mmxreg,mmxrm [rm: np o64nw 0f ee /r] KATMAI,MMX,SQ
+PMAXUB mmxreg,mmxrm [rm: np o64nw 0f de /r] KATMAI,MMX,SQ
+PMINSW mmxreg,mmxrm [rm: np o64nw 0f ea /r] KATMAI,MMX,SQ
+PMINUB mmxreg,mmxrm [rm: np o64nw 0f da /r] KATMAI,MMX,SQ
+PMOVMSKB reg32,mmxreg [rm: np 0f d7 /r] KATMAI,MMX
+PMULHUW mmxreg,mmxrm [rm: np o64nw 0f e4 /r] KATMAI,MMX,SQ
+PSADBW mmxreg,mmxrm [rm: np o64nw 0f f6 /r] KATMAI,MMX,SQ
+PSHUFW mmxreg,mmxrm,imm [rmi: np o64nw 0f 70 /r ib] KATMAI,MMX,SM2,SB,AR2
+
+;# AMD Enhanced 3DNow! (Athlon) instructions
+PF2IW mmxreg,mmxrm [rm: o64nw 0f 0f /r 1c] PENT,3DNOW,SQ
+PFNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8a] PENT,3DNOW,SQ
+PFPNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8e] PENT,3DNOW,SQ
+PI2FW mmxreg,mmxrm [rm: o64nw 0f 0f /r 0c] PENT,3DNOW,SQ
+PSWAPD mmxreg,mmxrm [rm: o64nw 0f 0f /r bb] PENT,3DNOW,SQ
+
+;# Willamette SSE2 Cacheability Instructions
+MASKMOVDQU xmmreg,xmmreg [rm: 66 0f f7 /r] WILLAMETTE,SSE2
+; CLFLUSH needs its own feature flag implemented one day
+CLFLUSH mem [m: np 0f ae /7] WILLAMETTE,SSE2
+MOVNTDQ mem,xmmreg [mr: 66 0f e7 /r] WILLAMETTE,SSE2,SO
+MOVNTI mem,reg32 [mr: np 0f c3 /r] WILLAMETTE,SD
+MOVNTI mem,reg64 [mr: o64 np 0f c3 /r] X64,SQ
+MOVNTPD mem,xmmreg [mr: 66 0f 2b /r] WILLAMETTE,SSE2,SO
+LFENCE void [ np 0f ae e8] WILLAMETTE,SSE2
+MFENCE void [ np 0f ae f0] WILLAMETTE,SSE2
+
+;# Willamette MMX instructions (SSE2 SIMD Integer Instructions)
+MOVD mem,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2,SD
+MOVD xmmreg,mem [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2,SD
+MOVD xmmreg,rm32 [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2
+MOVD rm32,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2
+MOVDQA xmmreg,xmmreg [rm: 66 0f 6f /r] WILLAMETTE,SSE2
+MOVDQA mem,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2,SO
+MOVDQA xmmreg,mem [rm: 66 0f 6f /r] WILLAMETTE,SSE2,SO
+MOVDQA xmmreg,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2
+MOVDQU xmmreg,xmmreg [rm: f3 0f 6f /r] WILLAMETTE,SSE2
+MOVDQU mem,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2,SO
+MOVDQU xmmreg,mem [rm: f3 0f 6f /r] WILLAMETTE,SSE2,SO
+MOVDQU xmmreg,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2
+MOVDQ2Q mmxreg,xmmreg [rm: f2 0f d6 /r] WILLAMETTE,SSE2
+MOVQ xmmreg,xmmreg [rm: f3 0f 7e /r] WILLAMETTE,SSE2
+MOVQ xmmreg,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2
+MOVQ mem,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2,SQ
+MOVQ xmmreg,mem [rm: f3 0f 7e /r] WILLAMETTE,SSE2,SQ
+MOVQ xmmreg,rm64 [rm: 66 o64 0f 6e /r] X64,SSE2
+MOVQ rm64,xmmreg [mr: 66 o64 0f 7e /r] X64,SSE2
+MOVQ2DQ xmmreg,mmxreg [rm: f3 0f d6 /r] WILLAMETTE,SSE2
+PACKSSWB xmmreg,xmmrm [rm: 66 0f 63 /r] WILLAMETTE,SSE2,SO
+PACKSSDW xmmreg,xmmrm [rm: 66 0f 6b /r] WILLAMETTE,SSE2,SO
+PACKUSWB xmmreg,xmmrm [rm: 66 0f 67 /r] WILLAMETTE,SSE2,SO
+PADDB xmmreg,xmmrm [rm: 66 0f fc /r] WILLAMETTE,SSE2,SO
+PADDW xmmreg,xmmrm [rm: 66 0f fd /r] WILLAMETTE,SSE2,SO
+PADDD xmmreg,xmmrm [rm: 66 0f fe /r] WILLAMETTE,SSE2,SO
+PADDQ mmxreg,mmxrm [rm: np 0f d4 /r] WILLAMETTE,MMX,SQ
+PADDQ xmmreg,xmmrm [rm: 66 0f d4 /r] WILLAMETTE,SSE2,SO
+PADDSB xmmreg,xmmrm [rm: 66 0f ec /r] WILLAMETTE,SSE2,SO
+PADDSW xmmreg,xmmrm [rm: 66 0f ed /r] WILLAMETTE,SSE2,SO
+PADDUSB xmmreg,xmmrm [rm: 66 0f dc /r] WILLAMETTE,SSE2,SO
+PADDUSW xmmreg,xmmrm [rm: 66 0f dd /r] WILLAMETTE,SSE2,SO
+PAND xmmreg,xmmrm [rm: 66 0f db /r] WILLAMETTE,SSE2,SO
+PANDN xmmreg,xmmrm [rm: 66 0f df /r] WILLAMETTE,SSE2,SO
+PAVGB xmmreg,xmmrm [rm: 66 0f e0 /r] WILLAMETTE,SSE2,SO
+PAVGW xmmreg,xmmrm [rm: 66 0f e3 /r] WILLAMETTE,SSE2,SO
+PCMPEQB xmmreg,xmmrm [rm: 66 0f 74 /r] WILLAMETTE,SSE2,SO
+PCMPEQW xmmreg,xmmrm [rm: 66 0f 75 /r] WILLAMETTE,SSE2,SO
+PCMPEQD xmmreg,xmmrm [rm: 66 0f 76 /r] WILLAMETTE,SSE2,SO
+PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r] WILLAMETTE,SSE2,SO
+PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r] WILLAMETTE,SSE2,SO
+PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r] WILLAMETTE,SSE2,SO
+PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,reg32,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2,ND
+PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r] WILLAMETTE,SSE2,SO
+PMAXSW xmmreg,xmmrm [rm: 66 0f ee /r] WILLAMETTE,SSE2,SO
+PMAXUB xmmreg,xmmrm [rm: 66 0f de /r] WILLAMETTE,SSE2,SO
+PMINSW xmmreg,xmmrm [rm: 66 0f ea /r] WILLAMETTE,SSE2,SO
+PMINUB xmmreg,xmmrm [rm: 66 0f da /r] WILLAMETTE,SSE2,SO
+PMOVMSKB reg32,xmmreg [rm: 66 0f d7 /r] WILLAMETTE,SSE2
+PMULHUW xmmreg,xmmrm [rm: 66 0f e4 /r] WILLAMETTE,SSE2,SO
+PMULHW xmmreg,xmmrm [rm: 66 0f e5 /r] WILLAMETTE,SSE2,SO
+PMULLW xmmreg,xmmrm [rm: 66 0f d5 /r] WILLAMETTE,SSE2,SO
+PMULUDQ mmxreg,mmxrm [rm: np o64nw 0f f4 /r] WILLAMETTE,SSE2,SO
+PMULUDQ xmmreg,xmmrm [rm: 66 0f f4 /r] WILLAMETTE,SSE2,SO
+POR xmmreg,xmmrm [rm: 66 0f eb /r] WILLAMETTE,SSE2,SO
+PSADBW xmmreg,xmmrm [rm: 66 0f f6 /r] WILLAMETTE,SSE2,SO
+PSHUFD xmmreg,xmmreg,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFD xmmreg,mem,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFHW xmmreg,xmmreg,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFHW xmmreg,mem,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFLW xmmreg,xmmreg,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFLW xmmreg,mem,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSLLDQ xmmreg,imm [mi: 66 0f 73 /7 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLW xmmreg,xmmrm [rm: 66 0f f1 /r] WILLAMETTE,SSE2,SO
+PSLLW xmmreg,imm [mi: 66 0f 71 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLD xmmreg,xmmrm [rm: 66 0f f2 /r] WILLAMETTE,SSE2,SO
+PSLLD xmmreg,imm [mi: 66 0f 72 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLQ xmmreg,xmmrm [rm: 66 0f f3 /r] WILLAMETTE,SSE2,SO
+PSLLQ xmmreg,imm [mi: 66 0f 73 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRAW xmmreg,xmmrm [rm: 66 0f e1 /r] WILLAMETTE,SSE2,SO
+PSRAW xmmreg,imm [mi: 66 0f 71 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRAD xmmreg,xmmrm [rm: 66 0f e2 /r] WILLAMETTE,SSE2,SO
+PSRAD xmmreg,imm [mi: 66 0f 72 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLDQ xmmreg,imm [mi: 66 0f 73 /3 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLW xmmreg,xmmrm [rm: 66 0f d1 /r] WILLAMETTE,SSE2,SO
+PSRLW xmmreg,imm [mi: 66 0f 71 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLD xmmreg,xmmrm [rm: 66 0f d2 /r] WILLAMETTE,SSE2,SO
+PSRLD xmmreg,imm [mi: 66 0f 72 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLQ xmmreg,xmmrm [rm: 66 0f d3 /r] WILLAMETTE,SSE2,SO
+PSRLQ xmmreg,imm [mi: 66 0f 73 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSUBB xmmreg,xmmrm [rm: 66 0f f8 /r] WILLAMETTE,SSE2,SO
+PSUBW xmmreg,xmmrm [rm: 66 0f f9 /r] WILLAMETTE,SSE2,SO
+PSUBD xmmreg,xmmrm [rm: 66 0f fa /r] WILLAMETTE,SSE2,SO
+PSUBQ mmxreg,mmxrm [rm: np o64nw 0f fb /r] WILLAMETTE,SSE2,SO
+PSUBQ xmmreg,xmmrm [rm: 66 0f fb /r] WILLAMETTE,SSE2,SO
+PSUBSB xmmreg,xmmrm [rm: 66 0f e8 /r] WILLAMETTE,SSE2,SO
+PSUBSW xmmreg,xmmrm [rm: 66 0f e9 /r] WILLAMETTE,SSE2,SO
+PSUBUSB xmmreg,xmmrm [rm: 66 0f d8 /r] WILLAMETTE,SSE2,SO
+PSUBUSW xmmreg,xmmrm [rm: 66 0f d9 /r] WILLAMETTE,SSE2,SO
+PUNPCKHBW xmmreg,xmmrm [rm: 66 0f 68 /r] WILLAMETTE,SSE2,SO
+PUNPCKHWD xmmreg,xmmrm [rm: 66 0f 69 /r] WILLAMETTE,SSE2,SO
+PUNPCKHDQ xmmreg,xmmrm [rm: 66 0f 6a /r] WILLAMETTE,SSE2,SO
+PUNPCKHQDQ xmmreg,xmmrm [rm: 66 0f 6d /r] WILLAMETTE,SSE2,SO
+PUNPCKLBW xmmreg,xmmrm [rm: 66 0f 60 /r] WILLAMETTE,SSE2,SO
+PUNPCKLWD xmmreg,xmmrm [rm: 66 0f 61 /r] WILLAMETTE,SSE2,SO
+PUNPCKLDQ xmmreg,xmmrm [rm: 66 0f 62 /r] WILLAMETTE,SSE2,SO
+PUNPCKLQDQ xmmreg,xmmrm [rm: 66 0f 6c /r] WILLAMETTE,SSE2,SO
+PXOR xmmreg,xmmrm [rm: 66 0f ef /r] WILLAMETTE,SSE2,SO
+
+;# Willamette Streaming SIMD instructions (SSE2)
+ADDPD xmmreg,xmmrm [rm: 66 0f 58 /r] WILLAMETTE,SSE2,SO
+ADDSD xmmreg,xmmrm [rm: f2 0f 58 /r] WILLAMETTE,SSE2,SQ
+ANDNPD xmmreg,xmmrm [rm: 66 0f 55 /r] WILLAMETTE,SSE2,SO
+ANDPD xmmreg,xmmrm [rm: 66 0f 54 /r] WILLAMETTE,SSE2,SO
+CMPEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 00] WILLAMETTE,SSE2,SO
+CMPEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 00] WILLAMETTE,SSE2
+CMPLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 02] WILLAMETTE,SSE2,SO
+CMPLESD xmmreg,xmmrm [rm: f2 0f c2 /r 02] WILLAMETTE,SSE2
+CMPLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 01] WILLAMETTE,SSE2,SO
+CMPLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 01] WILLAMETTE,SSE2
+CMPNEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 04] WILLAMETTE,SSE2,SO
+CMPNEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 04] WILLAMETTE,SSE2
+CMPNLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 06] WILLAMETTE,SSE2,SO
+CMPNLESD xmmreg,xmmrm [rm: f2 0f c2 /r 06] WILLAMETTE,SSE2
+CMPNLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 05] WILLAMETTE,SSE2,SO
+CMPNLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 05] WILLAMETTE,SSE2
+CMPORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 07] WILLAMETTE,SSE2,SO
+CMPORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 07] WILLAMETTE,SSE2
+CMPUNORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 03] WILLAMETTE,SSE2,SO
+CMPUNORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 03] WILLAMETTE,SSE2
+; CMPPD/CMPSD must come after the specific ops; that way the disassembler will find the
+; specific ops first and only disassemble illegal ones as cmppd/cmpsd.
+CMPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c2 /r ib,u] WILLAMETTE,SSE2
+CMPSD xmmreg,xmmrm128,imm8 [rmi: f2 0f c2 /r ib,u] WILLAMETTE,SSE2
+COMISD xmmreg,xmmrm [rm: 66 0f 2f /r] WILLAMETTE,SSE2
+CVTDQ2PD xmmreg,xmmrm [rm: f3 0f e6 /r] WILLAMETTE,SSE2,SQ
+CVTDQ2PS xmmreg,xmmrm [rm: np 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTPD2DQ xmmreg,xmmrm [rm: f2 0f e6 /r] WILLAMETTE,SSE2,SO
+CVTPD2PI mmxreg,xmmrm [rm: 66 0f 2d /r] WILLAMETTE,SSE2,SO
+CVTPD2PS xmmreg,xmmrm [rm: 66 0f 5a /r] WILLAMETTE,SSE2,SO
+CVTPI2PD xmmreg,mmxrm [rm: 66 0f 2a /r] WILLAMETTE,SSE2,SQ
+CVTPS2DQ xmmreg,xmmrm [rm: 66 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTPS2PD xmmreg,xmmrm [rm: np 0f 5a /r] WILLAMETTE,SSE2,SQ
+CVTSD2SI reg32,xmmreg [rm: norexw f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI reg32,mem [rm: norexw f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI reg64,xmmreg [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
+CVTSD2SI reg64,mem [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
+CVTSD2SS xmmreg,xmmrm [rm: f2 0f 5a /r] WILLAMETTE,SSE2,SQ
+CVTSI2SD xmmreg,mem [rm: f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1,ND
+CVTSI2SD xmmreg,rm32 [rm: norexw f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1
+CVTSI2SD xmmreg,rm64 [rm: o64 f2 0f 2a /r] X64,SSE2,SQ,AR1
+CVTSS2SD xmmreg,xmmrm [rm: f3 0f 5a /r] WILLAMETTE,SSE2,SD
+CVTTPD2PI mmxreg,xmmrm [rm: 66 0f 2c /r] WILLAMETTE,SSE2,SO
+CVTTPD2DQ xmmreg,xmmrm [rm: 66 0f e6 /r] WILLAMETTE,SSE2,SO
+CVTTPS2DQ xmmreg,xmmrm [rm: f3 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTTSD2SI reg32,xmmreg [rm: norexw f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI reg32,mem [rm: norexw f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI reg64,xmmreg [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
+CVTTSD2SI reg64,mem [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
+DIVPD xmmreg,xmmrm [rm: 66 0f 5e /r] WILLAMETTE,SSE2,SO
+DIVSD xmmreg,xmmrm [rm: f2 0f 5e /r] WILLAMETTE,SSE2
+MAXPD xmmreg,xmmrm [rm: 66 0f 5f /r] WILLAMETTE,SSE2,SO
+MAXSD xmmreg,xmmrm [rm: f2 0f 5f /r] WILLAMETTE,SSE2
+MINPD xmmreg,xmmrm [rm: 66 0f 5d /r] WILLAMETTE,SSE2,SO
+MINSD xmmreg,xmmrm [rm: f2 0f 5d /r] WILLAMETTE,SSE2
+MOVAPD xmmreg,xmmreg [rm: 66 0f 28 /r] WILLAMETTE,SSE2
+MOVAPD xmmreg,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2
+MOVAPD mem,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2,SO
+MOVAPD xmmreg,mem [rm: 66 0f 28 /r] WILLAMETTE,SSE2,SO
+MOVHPD mem,xmmreg [mr: 66 0f 17 /r] WILLAMETTE,SSE2
+MOVHPD xmmreg,mem [rm: 66 0f 16 /r] WILLAMETTE,SSE2
+MOVLPD mem64,xmmreg [mr: 66 0f 13 /r] WILLAMETTE,SSE2
+MOVLPD xmmreg,mem64 [rm: 66 0f 12 /r] WILLAMETTE,SSE2
+MOVMSKPD reg32,xmmreg [rm: 66 0f 50 /r] WILLAMETTE,SSE2
+MOVMSKPD reg64,xmmreg [rm: 66 o64 0f 50 /r] X64,SSE2
+MOVSD xmmreg,xmmreg [rm: f2 0f 10 /r] WILLAMETTE,SSE2
+MOVSD xmmreg,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
+MOVSD mem64,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
+MOVSD xmmreg,mem64 [rm: f2 0f 10 /r] WILLAMETTE,SSE2
+MOVUPD xmmreg,xmmreg [rm: 66 0f 10 /r] WILLAMETTE,SSE2
+MOVUPD xmmreg,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2
+MOVUPD mem,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2,SO
+MOVUPD xmmreg,mem [rm: 66 0f 10 /r] WILLAMETTE,SSE2,SO
+MULPD xmmreg,xmmrm [rm: 66 0f 59 /r] WILLAMETTE,SSE2,SO
+MULSD xmmreg,xmmrm [rm: f2 0f 59 /r] WILLAMETTE,SSE2
+ORPD xmmreg,xmmrm [rm: 66 0f 56 /r] WILLAMETTE,SSE2,SO
+SHUFPD xmmreg,xmmreg,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+SHUFPD xmmreg,mem,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SM,SB,AR2
+SQRTPD xmmreg,xmmrm [rm: 66 0f 51 /r] WILLAMETTE,SSE2,SO
+SQRTSD xmmreg,xmmrm [rm: f2 0f 51 /r] WILLAMETTE,SSE2
+SUBPD xmmreg,xmmrm [rm: 66 0f 5c /r] WILLAMETTE,SSE2,SO
+SUBSD xmmreg,xmmrm [rm: f2 0f 5c /r] WILLAMETTE,SSE2
+UCOMISD xmmreg,xmmrm [rm: 66 0f 2e /r] WILLAMETTE,SSE2
+UNPCKHPD xmmreg,xmmrm128 [rm: 66 0f 15 /r] WILLAMETTE,SSE2
+UNPCKLPD xmmreg,xmmrm128 [rm: 66 0f 14 /r] WILLAMETTE,SSE2
+XORPD xmmreg,xmmrm128 [rm: 66 0f 57 /r] WILLAMETTE,SSE2
+
+;# Prescott New Instructions (SSE3)
+ADDSUBPD xmmreg,xmmrm [rm: 66 0f d0 /r] PRESCOTT,SSE3,SO
+ADDSUBPS xmmreg,xmmrm [rm: f2 0f d0 /r] PRESCOTT,SSE3,SO
+HADDPD xmmreg,xmmrm [rm: 66 0f 7c /r] PRESCOTT,SSE3,SO
+HADDPS xmmreg,xmmrm [rm: f2 0f 7c /r] PRESCOTT,SSE3,SO
+HSUBPD xmmreg,xmmrm [rm: 66 0f 7d /r] PRESCOTT,SSE3,SO
+HSUBPS xmmreg,xmmrm [rm: f2 0f 7d /r] PRESCOTT,SSE3,SO
+LDDQU xmmreg,mem [rm: f2 0f f0 /r] PRESCOTT,SSE3,SO
+MOVDDUP xmmreg,xmmrm [rm: f2 0f 12 /r] PRESCOTT,SSE3
+MOVSHDUP xmmreg,xmmrm [rm: f3 0f 16 /r] PRESCOTT,SSE3
+MOVSLDUP xmmreg,xmmrm [rm: f3 0f 12 /r] PRESCOTT,SSE3
+
+;# VMX/SVM Instructions
+CLGI void [ 0f 01 dd] VMX,AMD
+STGI void [ 0f 01 dc] VMX,AMD
+VMCALL void [ 0f 01 c1] VMX
+VMCLEAR mem [m: 66 0f c7 /6] VMX
+VMFUNC void [ 0f 01 d4] VMX
+VMLAUNCH void [ 0f 01 c2] VMX
+VMLOAD void [ 0f 01 da] VMX,AMD
+VMMCALL void [ 0f 01 d9] VMX,AMD
+VMPTRLD mem [m: np 0f c7 /6] VMX
+VMPTRST mem [m: np 0f c7 /7] VMX
+VMREAD rm32,reg32 [mr: np 0f 78 /r] VMX,NOLONG,SD
+VMREAD rm64,reg64 [mr: o64nw np 0f 78 /r] X64,VMX,SQ
+VMRESUME void [ 0f 01 c3] VMX
+VMRUN void [ 0f 01 d8] VMX,AMD
+VMSAVE void [ 0f 01 db] VMX,AMD
+VMWRITE reg32,rm32 [rm: np 0f 79 /r] VMX,NOLONG,SD
+VMWRITE reg64,rm64 [rm: o64nw np 0f 79 /r] X64,VMX,SQ
+VMXOFF void [ 0f 01 c4] VMX
+VMXON mem [m: f3 0f c7 /6] VMX
+;# Extended Page Tables VMX instructions
+INVEPT reg32,mem [rm: 66 0f 38 80 /r] VMX,SO,NOLONG
+INVEPT reg64,mem [rm: o64nw 66 0f 38 80 /r] VMX,SO,LONG
+INVVPID reg32,mem [rm: 66 0f 38 81 /r] VMX,SO,NOLONG
+INVVPID reg64,mem [rm: o64nw 66 0f 38 81 /r] VMX,SO,LONG
+
+;# Tejas New Instructions (SSSE3)
+PABSB mmxreg,mmxrm [rm: np 0f 38 1c /r] SSSE3,MMX,SQ
+PABSB xmmreg,xmmrm [rm: 66 0f 38 1c /r] SSSE3
+PABSW mmxreg,mmxrm [rm: np 0f 38 1d /r] SSSE3,MMX,SQ
+PABSW xmmreg,xmmrm [rm: 66 0f 38 1d /r] SSSE3
+PABSD mmxreg,mmxrm [rm: np 0f 38 1e /r] SSSE3,MMX,SQ
+PABSD xmmreg,xmmrm [rm: 66 0f 38 1e /r] SSSE3
+PALIGNR mmxreg,mmxrm,imm [rmi: np 0f 3a 0f /r ib,u] SSSE3,MMX,SQ
+PALIGNR xmmreg,xmmrm,imm [rmi: 66 0f 3a 0f /r ib,u] SSSE3
+PHADDW mmxreg,mmxrm [rm: np 0f 38 01 /r] SSSE3,MMX,SQ
+PHADDW xmmreg,xmmrm [rm: 66 0f 38 01 /r] SSSE3
+PHADDD mmxreg,mmxrm [rm: np 0f 38 02 /r] SSSE3,MMX,SQ
+PHADDD xmmreg,xmmrm [rm: 66 0f 38 02 /r] SSSE3
+PHADDSW mmxreg,mmxrm [rm: np 0f 38 03 /r] SSSE3,MMX,SQ
+PHADDSW xmmreg,xmmrm [rm: 66 0f 38 03 /r] SSSE3
+PHSUBW mmxreg,mmxrm [rm: np 0f 38 05 /r] SSSE3,MMX,SQ
+PHSUBW xmmreg,xmmrm [rm: 66 0f 38 05 /r] SSSE3
+PHSUBD mmxreg,mmxrm [rm: np 0f 38 06 /r] SSSE3,MMX,SQ
+PHSUBD xmmreg,xmmrm [rm: 66 0f 38 06 /r] SSSE3
+PHSUBSW mmxreg,mmxrm [rm: np 0f 38 07 /r] SSSE3,MMX,SQ
+PHSUBSW xmmreg,xmmrm [rm: 66 0f 38 07 /r] SSSE3
+PMADDUBSW mmxreg,mmxrm [rm: np 0f 38 04 /r] SSSE3,MMX,SQ
+PMADDUBSW xmmreg,xmmrm [rm: 66 0f 38 04 /r] SSSE3
+PMULHRSW mmxreg,mmxrm [rm: np 0f 38 0b /r] SSSE3,MMX,SQ
+PMULHRSW xmmreg,xmmrm [rm: 66 0f 38 0b /r] SSSE3
+PSHUFB mmxreg,mmxrm [rm: np 0f 38 00 /r] SSSE3,MMX,SQ
+PSHUFB xmmreg,xmmrm [rm: 66 0f 38 00 /r] SSSE3
+PSIGNB mmxreg,mmxrm [rm: np 0f 38 08 /r] SSSE3,MMX,SQ
+PSIGNB xmmreg,xmmrm [rm: 66 0f 38 08 /r] SSSE3
+PSIGNW mmxreg,mmxrm [rm: np 0f 38 09 /r] SSSE3,MMX,SQ
+PSIGNW xmmreg,xmmrm [rm: 66 0f 38 09 /r] SSSE3
+PSIGND mmxreg,mmxrm [rm: np 0f 38 0a /r] SSSE3,MMX,SQ
+PSIGND xmmreg,xmmrm [rm: 66 0f 38 0a /r] SSSE3
+
+;# AMD SSE4A
+EXTRQ xmmreg,imm,imm [mij: 66 0f 78 /0 ib,u ib,u] SSE4A,AMD
+EXTRQ xmmreg,xmmreg [rm: 66 0f 79 /r] SSE4A,AMD
+INSERTQ xmmreg,xmmreg,imm,imm [rmij: f2 0f 78 /r ib,u ib,u] SSE4A,AMD
+INSERTQ xmmreg,xmmreg [rm: f2 0f 79 /r] SSE4A,AMD
+MOVNTSD mem,xmmreg [mr: f2 0f 2b /r] SSE4A,AMD,SQ
+MOVNTSS mem,xmmreg [mr: f3 0f 2b /r] SSE4A,AMD,SD
+
+;# New instructions in Barcelona
+LZCNT reg16,rm16 [rm: o16 f3i 0f bd /r] P6,AMD
+LZCNT reg32,rm32 [rm: o32 f3i 0f bd /r] P6,AMD
+LZCNT reg64,rm64 [rm: o64 f3i 0f bd /r] X64,AMD
+
+;# Penryn New Instructions (SSE4.1)
+BLENDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0d /r ib,u] SSE41
+BLENDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0c /r ib,u] SSE41
+BLENDVPD xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 15 /r] SSE41
+BLENDVPD xmmreg,xmmrm [rm: 66 0f 38 15 /r] SSE41
+BLENDVPS xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 14 /r] SSE41
+BLENDVPS xmmreg,xmmrm [rm: 66 0f 38 14 /r] SSE41
+DPPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 41 /r ib,u] SSE41
+DPPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 40 /r ib,u] SSE41
+EXTRACTPS rm32,xmmreg,imm [mri: 66 0f 3a 17 /r ib,u] SSE41
+EXTRACTPS reg64,xmmreg,imm [mri: o64 66 0f 3a 17 /r ib,u] SSE41,X64
+INSERTPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 21 /r ib,u] SSE41,SD
+MOVNTDQA xmmreg,mem128 [rm: 66 0f 38 2a /r] SSE41
+MPSADBW xmmreg,xmmrm,imm [rmi: 66 0f 3a 42 /r ib,u] SSE41
+PACKUSDW xmmreg,xmmrm [rm: 66 0f 38 2b /r] SSE41
+PBLENDVB xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 10 /r] SSE41
+PBLENDVB xmmreg,xmmrm [rm: 66 0f 38 10 /r] SSE41
+PBLENDW xmmreg,xmmrm,imm [rmi: 66 0f 3a 0e /r ib,u] SSE41
+PCMPEQQ xmmreg,xmmrm [rm: 66 0f 38 29 /r] SSE41
+PEXTRB reg32,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
+PEXTRB mem8,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
+PEXTRB reg64,xmmreg,imm [mri: o64 66 0f 3a 14 /r ib,u] SSE41,X64
+PEXTRD rm32,xmmreg,imm [mri: norexw 66 0f 3a 16 /r ib,u] SSE41
+PEXTRQ rm64,xmmreg,imm [mri: o64 66 0f 3a 16 /r ib,u] SSE41,X64
+PEXTRW reg32,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
+PEXTRW mem16,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
+PEXTRW reg64,xmmreg,imm [mri: o64 66 0f 3a 15 /r ib,u] SSE41,X64
+PHMINPOSUW xmmreg,xmmrm [rm: 66 0f 38 41 /r] SSE41
+PINSRB xmmreg,mem,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRB xmmreg,rm8,imm [rmi: nohi 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRB xmmreg,reg32,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRD xmmreg,mem,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
+PINSRD xmmreg,rm32,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
+PINSRQ xmmreg,mem,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
+PINSRQ xmmreg,rm64,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
+PMAXSB xmmreg,xmmrm [rm: 66 0f 38 3c /r] SSE41
+PMAXSD xmmreg,xmmrm [rm: 66 0f 38 3d /r] SSE41
+PMAXUD xmmreg,xmmrm [rm: 66 0f 38 3f /r] SSE41
+PMAXUW xmmreg,xmmrm [rm: 66 0f 38 3e /r] SSE41
+PMINSB xmmreg,xmmrm [rm: 66 0f 38 38 /r] SSE41
+PMINSD xmmreg,xmmrm [rm: 66 0f 38 39 /r] SSE41
+PMINUD xmmreg,xmmrm [rm: 66 0f 38 3b /r] SSE41
+PMINUW xmmreg,xmmrm [rm: 66 0f 38 3a /r] SSE41
+PMOVSXBW xmmreg,xmmrm [rm: 66 0f 38 20 /r] SSE41,SQ
+PMOVSXBD xmmreg,xmmrm [rm: 66 0f 38 21 /r] SSE41,SD
+PMOVSXBQ xmmreg,xmmrm [rm: 66 0f 38 22 /r] SSE41,SW
+PMOVSXWD xmmreg,xmmrm [rm: 66 0f 38 23 /r] SSE41,SQ
+PMOVSXWQ xmmreg,xmmrm [rm: 66 0f 38 24 /r] SSE41,SD
+PMOVSXDQ xmmreg,xmmrm [rm: 66 0f 38 25 /r] SSE41,SQ
+PMOVZXBW xmmreg,xmmrm [rm: 66 0f 38 30 /r] SSE41,SQ
+PMOVZXBD xmmreg,xmmrm [rm: 66 0f 38 31 /r] SSE41,SD
+PMOVZXBQ xmmreg,xmmrm [rm: 66 0f 38 32 /r] SSE41,SW
+PMOVZXWD xmmreg,xmmrm [rm: 66 0f 38 33 /r] SSE41,SQ
+PMOVZXWQ xmmreg,xmmrm [rm: 66 0f 38 34 /r] SSE41,SD
+PMOVZXDQ xmmreg,xmmrm [rm: 66 0f 38 35 /r] SSE41,SQ
+PMULDQ xmmreg,xmmrm [rm: 66 0f 38 28 /r] SSE41
+PMULLD xmmreg,xmmrm [rm: 66 0f 38 40 /r] SSE41
+PTEST xmmreg,xmmrm [rm: 66 0f 38 17 /r] SSE41
+ROUNDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 09 /r ib,u] SSE41
+ROUNDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 08 /r ib,u] SSE41
+ROUNDSD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0b /r ib,u] SSE41
+ROUNDSS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0a /r ib,u] SSE41
+
+;# Nehalem New Instructions (SSE4.2)
+CRC32 reg32,rm8 [rm: f2i 0f 38 f0 /r] SSE42
+CRC32 reg32,rm16 [rm: o16 f2i 0f 38 f1 /r] SSE42
+CRC32 reg32,rm32 [rm: o32 f2i 0f 38 f1 /r] SSE42
+CRC32 reg64,rm8 [rm: o64 f2i 0f 38 f0 /r] SSE42,X64
+CRC32 reg64,rm64 [rm: o64 f2i 0f 38 f1 /r] SSE42,X64
+PCMPESTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 61 /r ib,u] SSE42
+PCMPESTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 60 /r ib,u] SSE42
+PCMPISTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 63 /r ib,u] SSE42
+PCMPISTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 62 /r ib,u] SSE42
+PCMPGTQ xmmreg,xmmrm [rm: 66 0f 38 37 /r] SSE42
+POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r] NEHALEM,SW
+POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r] NEHALEM,SD
+POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r] NEHALEM,SQ,X64
+
+;# Intel SMX
+GETSEC void [ 0f 37] KATMAI
+
+;# Geode (Cyrix) 3DNow! additions
+PFRCPV mmxreg,mmxrm [rm: o64nw 0f 0f /r 86] PENT,3DNOW,SQ,CYRIX
+PFRSQRTV mmxreg,mmxrm [rm: o64nw 0f 0f /r 87] PENT,3DNOW,SQ,CYRIX
+
+;# Intel new instructions in ???
+; Is NEHALEM right here?
+MOVBE reg16,mem16 [rm: o16 norep 0f 38 f0 /r] NEHALEM,SM
+MOVBE reg32,mem32 [rm: o32 norep 0f 38 f0 /r] NEHALEM,SM
+MOVBE reg64,mem64 [rm: o64 norep 0f 38 f0 /r] NEHALEM,SM
+MOVBE mem16,reg16 [mr: o16 norep 0f 38 f1 /r] NEHALEM,SM
+MOVBE mem32,reg32 [mr: o32 norep 0f 38 f1 /r] NEHALEM,SM
+MOVBE mem64,reg64 [mr: o64 norep 0f 38 f1 /r] NEHALEM,SM
+
+;# Intel AES instructions
+AESENC xmmreg,xmmrm128 [rm: 66 0f 38 dc /r] SSE,WESTMERE
+AESENCLAST xmmreg,xmmrm128 [rm: 66 0f 38 dd /r] SSE,WESTMERE
+AESDEC xmmreg,xmmrm128 [rm: 66 0f 38 de /r] SSE,WESTMERE
+AESDECLAST xmmreg,xmmrm128 [rm: 66 0f 38 df /r] SSE,WESTMERE
+AESIMC xmmreg,xmmrm128 [rm: 66 0f 38 db /r] SSE,WESTMERE
+AESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a df /r ib] SSE,WESTMERE
+
+;# Intel AVX AES instructions
+VAESENC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dc /r] AVX,SANDYBRIDGE
+VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dd /r] AVX,SANDYBRIDGE
+VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 de /r] AVX,SANDYBRIDGE
+VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 df /r] AVX,SANDYBRIDGE
+VAESIMC xmmreg,xmmrm128 [rm: vex.128.66.0f38 db /r] AVX,SANDYBRIDGE
+VAESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a df /r ib] AVX,SANDYBRIDGE
+
+;# Intel AVX instructions
+VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r] AVX,SANDYBRIDGE
+VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r] AVX,SANDYBRIDGE
+VADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 58 /r] AVX,SANDYBRIDGE
+VADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 58 /r] AVX,SANDYBRIDGE
+VADDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 58 /r] AVX,SANDYBRIDGE
+VADDSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 58 /r] AVX,SANDYBRIDGE
+VADDSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d0 /r] AVX,SANDYBRIDGE
+VADDSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d0 /r] AVX,SANDYBRIDGE
+VADDSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f d0 /r] AVX,SANDYBRIDGE
+VADDSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f d0 /r] AVX,SANDYBRIDGE
+VANDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 54 /r] AVX,SANDYBRIDGE
+VANDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 54 /r] AVX,SANDYBRIDGE
+VANDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 54 /r] AVX,SANDYBRIDGE
+VANDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 54 /r] AVX,SANDYBRIDGE
+VANDNPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 55 /r] AVX,SANDYBRIDGE
+VANDNPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 55 /r] AVX,SANDYBRIDGE
+VANDNPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 55 /r] AVX,SANDYBRIDGE
+VANDNPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 55 /r] AVX,SANDYBRIDGE
+VBLENDPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0d /r ib] AVX,SANDYBRIDGE
+VBLENDPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0d /r ib] AVX,SANDYBRIDGE
+VBLENDPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0c /r ib] AVX,SANDYBRIDGE
+VBLENDPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0c /r ib] AVX,SANDYBRIDGE
+VBLENDVPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4b /r /is4] AVX,SANDYBRIDGE
+VBLENDVPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4b /r /is4] AVX,SANDYBRIDGE
+VBLENDVPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4a /r /is4] AVX,SANDYBRIDGE
+VBLENDVPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4a /r /is4] AVX,SANDYBRIDGE
+VBROADCASTSS xmmreg,mem32 [rm: vex.128.66.0f38.w0 18 /r] AVX,SANDYBRIDGE
+VBROADCASTSS ymmreg,mem32 [rm: vex.256.66.0f38.w0 18 /r] AVX,SANDYBRIDGE
+VBROADCASTSD ymmreg,mem64 [rm: vex.256.66.0f38.w0 19 /r] AVX,SANDYBRIDGE
+VBROADCASTF128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 1a /r] AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPLT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPUNORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPNEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNLT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPNGE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPFALSE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPNEQ_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPNEQ_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPGE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPTRUE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPLT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPLE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPUNORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPUNORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPNEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNLT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPNLE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPNGE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPNGT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPFALSE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPFALSE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPNEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPNEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPGE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPGT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPTRUE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPTRUE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c2 /r ib] AVX,SANDYBRIDGE
+VCMPPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c2 /r ib] AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPLT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPUNORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPNEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNLT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPNGE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPFALSE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPNEQ_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPNEQ_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPGE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPTRUE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPLT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPLE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPUNORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPUNORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPNEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNLT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPNLE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPNGE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPNGT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPFALSE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPFALSE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPNEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPNEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPGE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPGT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPTRUE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPTRUE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c2 /r ib] AVX,SANDYBRIDGE
+VCMPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c2 /r ib] AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPLT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPUNORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPNEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNLT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPNGE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPFALSE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPNEQ_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPGE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPTRUE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPLT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPUNORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPNEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNLT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPNGE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPFALSE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPNEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPGE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPTRUE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f2.0f c2 /r ib] AVX,SANDYBRIDGE
+; Specific aliases first, then the generic version, to keep the disassembler happy...
+VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPLT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
+VCMPLE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02] AVX,SANDYBRIDGE
+VCMPUNORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPUNORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03] AVX,SANDYBRIDGE
+VCMPNEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04] AVX,SANDYBRIDGE
+VCMPNLT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05] AVX,SANDYBRIDGE
+VCMPNLE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPNLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06] AVX,SANDYBRIDGE
+VCMPORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07] AVX,SANDYBRIDGE
+VCMPEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 08] AVX,SANDYBRIDGE
+VCMPNGE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09] AVX,SANDYBRIDGE
+VCMPNGT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPNGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a] AVX,SANDYBRIDGE
+VCMPFALSE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPFALSESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b] AVX,SANDYBRIDGE
+VCMPNEQ_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0c] AVX,SANDYBRIDGE
+VCMPGE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d] AVX,SANDYBRIDGE
+VCMPGT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e] AVX,SANDYBRIDGE
+VCMPTRUE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPTRUESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f] AVX,SANDYBRIDGE
+VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPLT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 11] AVX,SANDYBRIDGE
+VCMPLE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 12] AVX,SANDYBRIDGE
+VCMPUNORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 13] AVX,SANDYBRIDGE
+VCMPNEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 14] AVX,SANDYBRIDGE
+VCMPNLT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 15] AVX,SANDYBRIDGE
+VCMPNLE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 16] AVX,SANDYBRIDGE
+VCMPORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 17] AVX,SANDYBRIDGE
+VCMPEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 18] AVX,SANDYBRIDGE
+VCMPNGE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 19] AVX,SANDYBRIDGE
+VCMPNGT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1a] AVX,SANDYBRIDGE
+VCMPFALSE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1b] AVX,SANDYBRIDGE
+VCMPNEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1c] AVX,SANDYBRIDGE
+VCMPGE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1d] AVX,SANDYBRIDGE
+VCMPGT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1e] AVX,SANDYBRIDGE
+VCMPTRUE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1f] AVX,SANDYBRIDGE
+VCMPSS xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f3.0f c2 /r ib] AVX,SANDYBRIDGE
+VCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2f /r] AVX,SANDYBRIDGE
+VCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2f /r] AVX,SANDYBRIDGE
+VCVTDQ2PD xmmreg,xmmrm64 [rm: vex.128.f3.0f e6 /r] AVX,SANDYBRIDGE
+VCVTDQ2PD ymmreg,xmmrm128 [rm: vex.256.f3.0f e6 /r] AVX,SANDYBRIDGE
+VCVTDQ2PS xmmreg,xmmrm128 [rm: vex.128.0f 5b /r] AVX,SANDYBRIDGE
+VCVTDQ2PS ymmreg,ymmrm256 [rm: vex.256.0f 5b /r] AVX,SANDYBRIDGE
+VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE
+VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE,SO
+VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE
+VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE,SY
+VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE
+VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE,SO
+VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE
+VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE,SY
+VCVTPS2DQ xmmreg,xmmrm128 [rm: vex.128.66.0f 5b /r] AVX,SANDYBRIDGE
+VCVTPS2DQ ymmreg,ymmrm256 [rm: vex.256.66.0f 5b /r] AVX,SANDYBRIDGE
+VCVTPS2PD xmmreg,xmmrm64 [rm: vex.128.0f 5a /r] AVX,SANDYBRIDGE
+VCVTPS2PD ymmreg,xmmrm128 [rm: vex.256.0f 5a /r] AVX,SANDYBRIDGE
+VCVTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2d /r] AVX,SANDYBRIDGE
+VCVTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG
+VCVTSD2SS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5a /r] AVX,SANDYBRIDGE
+VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,SD
+VCVTSI2SD xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD
+VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f2.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ
+VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,SD
+VCVTSI2SS xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD
+VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f3.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ
+VCVTSS2SD xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5a /r] AVX,SANDYBRIDGE
+VCVTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2d /r] AVX,SANDYBRIDGE
+VCVTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG
+VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE
+VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE,SO
+VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE
+VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE,SY
+VCVTTPS2DQ xmmreg,xmmrm128 [rm: vex.128.f3.0f 5b /r] AVX,SANDYBRIDGE
+VCVTTPS2DQ ymmreg,ymmrm256 [rm: vex.256.f3.0f 5b /r] AVX,SANDYBRIDGE
+VCVTTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2c /r] AVX,SANDYBRIDGE
+VCVTTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2c /r] AVX,SANDYBRIDGE,LONG
+VCVTTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2c /r] AVX,SANDYBRIDGE
+VCVTTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2c /r] AVX,SANDYBRIDGE,LONG
+VDIVPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5e /r] AVX,SANDYBRIDGE
+VDIVPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5e /r] AVX,SANDYBRIDGE
+VDIVPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5e /r] AVX,SANDYBRIDGE
+VDIVPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5e /r] AVX,SANDYBRIDGE
+VDIVSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5e /r] AVX,SANDYBRIDGE
+VDIVSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5e /r] AVX,SANDYBRIDGE
+VDPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 41 /r ib] AVX,SANDYBRIDGE
+VDPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 40 /r ib] AVX,SANDYBRIDGE
+VDPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 40 /r ib] AVX,SANDYBRIDGE
+VEXTRACTF128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 19 /r ib] AVX,SANDYBRIDGE
+VEXTRACTPS rm32,xmmreg,imm8 [mri: vex.128.66.0f3a 17 /r ib] AVX,SANDYBRIDGE
+VHADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7c /r] AVX,SANDYBRIDGE
+VHADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7c /r] AVX,SANDYBRIDGE
+VHADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7c /r] AVX,SANDYBRIDGE
+VHADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7c /r] AVX,SANDYBRIDGE
+VHSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7d /r] AVX,SANDYBRIDGE
+VHSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7d /r] AVX,SANDYBRIDGE
+VHSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7d /r] AVX,SANDYBRIDGE
+VHSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7d /r] AVX,SANDYBRIDGE
+VINSERTF128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 18 /r ib] AVX,SANDYBRIDGE
+VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 21 /r ib] AVX,SANDYBRIDGE
+VLDDQU xmmreg,mem128 [rm: vex.128.f2.0f f0 /r] AVX,SANDYBRIDGE
+VLDQQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE
+VLDDQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE
+VLDMXCSR mem32 [m: vex.lz.0f ae /2] AVX,SANDYBRIDGE
+VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r] AVX,SANDYBRIDGE
+VMASKMOVPS xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2c /r] AVX,SANDYBRIDGE
+VMASKMOVPS ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2c /r] AVX,SANDYBRIDGE
+VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2e /r] AVX,SANDYBRIDGE,SO
+VMASKMOVPS mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2e /r] AVX,SANDYBRIDGE,SY
+VMASKMOVPD xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2d /r] AVX,SANDYBRIDGE
+VMASKMOVPD ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2d /r] AVX,SANDYBRIDGE
+VMASKMOVPD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2f /r] AVX,SANDYBRIDGE
+VMASKMOVPD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2f /r] AVX,SANDYBRIDGE
+VMAXPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5f /r] AVX,SANDYBRIDGE
+VMAXPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5f /r] AVX,SANDYBRIDGE
+VMAXPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5f /r] AVX,SANDYBRIDGE
+VMAXPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5f /r] AVX,SANDYBRIDGE
+VMAXSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5f /r] AVX,SANDYBRIDGE
+VMAXSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5f /r] AVX,SANDYBRIDGE
+VMINPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5d /r] AVX,SANDYBRIDGE
+VMINPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5d /r] AVX,SANDYBRIDGE
+VMINPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5d /r] AVX,SANDYBRIDGE
+VMINPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5d /r] AVX,SANDYBRIDGE
+VMINSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5d /r] AVX,SANDYBRIDGE
+VMINSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5d /r] AVX,SANDYBRIDGE
+VMOVAPD xmmreg,xmmrm128 [rm: vex.128.66.0f 28 /r] AVX,SANDYBRIDGE
+VMOVAPD xmmrm128,xmmreg [mr: vex.128.66.0f 29 /r] AVX,SANDYBRIDGE
+VMOVAPD ymmreg,ymmrm256 [rm: vex.256.66.0f 28 /r] AVX,SANDYBRIDGE
+VMOVAPD ymmrm256,ymmreg [mr: vex.256.66.0f 29 /r] AVX,SANDYBRIDGE
+VMOVAPS xmmreg,xmmrm128 [rm: vex.128.0f 28 /r] AVX,SANDYBRIDGE
+VMOVAPS xmmrm128,xmmreg [mr: vex.128.0f 29 /r] AVX,SANDYBRIDGE
+VMOVAPS ymmreg,ymmrm256 [rm: vex.256.0f 28 /r] AVX,SANDYBRIDGE
+VMOVAPS ymmrm256,ymmreg [mr: vex.256.0f 29 /r] AVX,SANDYBRIDGE
+VMOVD xmmreg,rm32 [rm: vex.128.66.0f.w0 6e /r] AVX,SANDYBRIDGE
+VMOVD rm32,xmmreg [mr: vex.128.66.0f.w0 7e /r] AVX,SANDYBRIDGE
+VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r] AVX,SANDYBRIDGE,SQ
+VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r] AVX,SANDYBRIDGE,SQ
+VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r] AVX,SANDYBRIDGE,LONG,SQ
+VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r] AVX,SANDYBRIDGE,LONG,SQ
+VMOVDDUP xmmreg,xmmrm64 [rm: vex.128.f2.0f 12 /r] AVX,SANDYBRIDGE
+VMOVDDUP ymmreg,ymmrm256 [rm: vex.256.f2.0f 12 /r] AVX,SANDYBRIDGE
+VMOVDQA xmmreg,xmmrm128 [rm: vex.128.66.0f 6f /r] AVX,SANDYBRIDGE
+VMOVDQA xmmrm128,xmmreg [mr: vex.128.66.0f 7f /r] AVX,SANDYBRIDGE
+; These are officially documented as VMOVDQA, but VMOVQQA seems more logical to me...
+VMOVQQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r] AVX,SANDYBRIDGE
+VMOVQQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r] AVX,SANDYBRIDGE
+VMOVDQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r] AVX,SANDYBRIDGE
+VMOVDQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r] AVX,SANDYBRIDGE
+VMOVDQU xmmreg,xmmrm128 [rm: vex.128.f3.0f 6f /r] AVX,SANDYBRIDGE
+VMOVDQU xmmrm128,xmmreg [mr: vex.128.f3.0f 7f /r] AVX,SANDYBRIDGE
+; These are officially documented as VMOVDQU, but VMOVQQU seems more logical to me...
+VMOVQQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r] AVX,SANDYBRIDGE
+VMOVQQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r] AVX,SANDYBRIDGE
+VMOVDQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r] AVX,SANDYBRIDGE
+VMOVDQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r] AVX,SANDYBRIDGE
+VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 12 /r] AVX,SANDYBRIDGE
+VMOVHPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 16 /r] AVX,SANDYBRIDGE
+VMOVHPD mem64,xmmreg [mr: vex.128.66.0f 17 /r] AVX,SANDYBRIDGE
+VMOVHPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 16 /r] AVX,SANDYBRIDGE
+VMOVHPS mem64,xmmreg [mr: vex.128.0f 17 /r] AVX,SANDYBRIDGE
+VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 16 /r] AVX,SANDYBRIDGE
+VMOVLPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 12 /r] AVX,SANDYBRIDGE
+VMOVLPD mem64,xmmreg [mr: vex.128.66.0f 13 /r] AVX,SANDYBRIDGE
+VMOVLPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 12 /r] AVX,SANDYBRIDGE
+VMOVLPS mem64,xmmreg [mr: vex.128.0f 13 /r] AVX,SANDYBRIDGE
+VMOVMSKPD reg64,xmmreg [rm: vex.128.66.0f 50 /r] AVX,SANDYBRIDGE,LONG
+VMOVMSKPD reg32,xmmreg [rm: vex.128.66.0f 50 /r] AVX,SANDYBRIDGE
+VMOVMSKPD reg64,ymmreg [rm: vex.256.66.0f 50 /r] AVX,SANDYBRIDGE,LONG
+VMOVMSKPD reg32,ymmreg [rm: vex.256.66.0f 50 /r] AVX,SANDYBRIDGE
+VMOVMSKPS reg64,xmmreg [rm: vex.128.0f 50 /r] AVX,SANDYBRIDGE,LONG
+VMOVMSKPS reg32,xmmreg [rm: vex.128.0f 50 /r] AVX,SANDYBRIDGE
+VMOVMSKPS reg64,ymmreg [rm: vex.256.0f 50 /r] AVX,SANDYBRIDGE,LONG
+VMOVMSKPS reg32,ymmreg [rm: vex.256.0f 50 /r] AVX,SANDYBRIDGE
+VMOVNTDQ mem128,xmmreg [mr: vex.128.66.0f e7 /r] AVX,SANDYBRIDGE
+; Officially VMOVNTDQ, but VMOVNTQQ seems more logical to me...
+VMOVNTQQ mem256,ymmreg [mr: vex.256.66.0f e7 /r] AVX,SANDYBRIDGE
+VMOVNTDQ mem256,ymmreg [mr: vex.256.66.0f e7 /r] AVX,SANDYBRIDGE
+VMOVNTDQA xmmreg,mem128 [rm: vex.128.66.0f38 2a /r] AVX,SANDYBRIDGE
+VMOVNTPD mem128,xmmreg [mr: vex.128.66.0f 2b /r] AVX,SANDYBRIDGE
+VMOVNTPD mem256,ymmreg [mr: vex.256.66.0f 2b /r] AVX,SANDYBRIDGE
+VMOVNTPS mem128,xmmreg [mr: vex.128.0f 2b /r] AVX,SANDYBRIDGE
+VMOVNTPS mem256,ymmreg [mr: vex.256.0f 2b /r] AVX,SANDYBRIDGE
+VMOVSD xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f2.0f 10 /r] AVX,SANDYBRIDGE
+VMOVSD xmmreg,mem64 [rm: vex.lig.f2.0f 10 /r] AVX,SANDYBRIDGE
+VMOVSD xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f2.0f 11 /r] AVX,SANDYBRIDGE
+VMOVSD mem64,xmmreg [mr: vex.lig.f2.0f 11 /r] AVX,SANDYBRIDGE
+VMOVSHDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 16 /r] AVX,SANDYBRIDGE
+VMOVSHDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 16 /r] AVX,SANDYBRIDGE
+VMOVSLDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 12 /r] AVX,SANDYBRIDGE
+VMOVSLDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 12 /r] AVX,SANDYBRIDGE
+VMOVSS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
+VMOVSS xmmreg,mem32 [rm: vex.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
+VMOVSS xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
+VMOVSS mem32,xmmreg [mr: vex.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
+VMOVUPD xmmreg,xmmrm128 [rm: vex.128.66.0f 10 /r] AVX,SANDYBRIDGE
+VMOVUPD xmmrm128,xmmreg [mr: vex.128.66.0f 11 /r] AVX,SANDYBRIDGE
+VMOVUPD ymmreg,ymmrm256 [rm: vex.256.66.0f 10 /r] AVX,SANDYBRIDGE
+VMOVUPD ymmrm256,ymmreg [mr: vex.256.66.0f 11 /r] AVX,SANDYBRIDGE
+VMOVUPS xmmreg,xmmrm128 [rm: vex.128.0f 10 /r] AVX,SANDYBRIDGE
+VMOVUPS xmmrm128,xmmreg [mr: vex.128.0f 11 /r] AVX,SANDYBRIDGE
+VMOVUPS ymmreg,ymmrm256 [rm: vex.256.0f 10 /r] AVX,SANDYBRIDGE
+VMOVUPS ymmrm256,ymmreg [mr: vex.256.0f 11 /r] AVX,SANDYBRIDGE
+VMPSADBW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 42 /r ib] AVX,SANDYBRIDGE
+VMULPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 59 /r] AVX,SANDYBRIDGE
+VMULPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 59 /r] AVX,SANDYBRIDGE
+VMULPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 59 /r] AVX,SANDYBRIDGE
+VMULPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 59 /r] AVX,SANDYBRIDGE
+VMULSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 59 /r] AVX,SANDYBRIDGE
+VMULSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 59 /r] AVX,SANDYBRIDGE
+VORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 56 /r] AVX,SANDYBRIDGE
+VORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 56 /r] AVX,SANDYBRIDGE
+VORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 56 /r] AVX,SANDYBRIDGE
+VORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 56 /r] AVX,SANDYBRIDGE
+VPABSB xmmreg,xmmrm128 [rm: vex.128.66.0f38 1c /r] AVX,SANDYBRIDGE
+VPABSW xmmreg,xmmrm128 [rm: vex.128.66.0f38 1d /r] AVX,SANDYBRIDGE
+VPABSD xmmreg,xmmrm128 [rm: vex.128.66.0f38 1e /r] AVX,SANDYBRIDGE
+VPACKSSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 63 /r] AVX,SANDYBRIDGE
+VPACKSSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6b /r] AVX,SANDYBRIDGE
+VPACKUSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 67 /r] AVX,SANDYBRIDGE
+VPACKUSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 2b /r] AVX,SANDYBRIDGE
+VPADDB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fc /r] AVX,SANDYBRIDGE
+VPADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fd /r] AVX,SANDYBRIDGE
+VPADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fe /r] AVX,SANDYBRIDGE
+VPADDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d4 /r] AVX,SANDYBRIDGE
+VPADDSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ec /r] AVX,SANDYBRIDGE
+VPADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ed /r] AVX,SANDYBRIDGE
+VPADDUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dc /r] AVX,SANDYBRIDGE
+VPADDUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dd /r] AVX,SANDYBRIDGE
+VPALIGNR xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0f /r ib] AVX,SANDYBRIDGE
+VPAND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f db /r] AVX,SANDYBRIDGE
+VPANDN xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f df /r] AVX,SANDYBRIDGE
+VPAVGB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e0 /r] AVX,SANDYBRIDGE
+VPAVGW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e3 /r] AVX,SANDYBRIDGE
+VPBLENDVB xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4c /r /is4] AVX,SANDYBRIDGE
+VPBLENDW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0e /r ib] AVX,SANDYBRIDGE
+VPCMPESTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 61 /r ib] AVX,SANDYBRIDGE
+VPCMPESTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 60 /r ib] AVX,SANDYBRIDGE
+VPCMPISTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 63 /r ib] AVX,SANDYBRIDGE
+VPCMPISTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 62 /r ib] AVX,SANDYBRIDGE
+VPCMPEQB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 74 /r] AVX,SANDYBRIDGE
+VPCMPEQW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 75 /r] AVX,SANDYBRIDGE
+VPCMPEQD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 76 /r] AVX,SANDYBRIDGE
+VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 29 /r] AVX,SANDYBRIDGE
+VPCMPGTB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 64 /r] AVX,SANDYBRIDGE
+VPCMPGTW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 65 /r] AVX,SANDYBRIDGE
+VPCMPGTD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 66 /r] AVX,SANDYBRIDGE
+VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 37 /r] AVX,SANDYBRIDGE
+VPERMILPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
+VPERMILPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
+VPERMILPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 05 /r ib] AVX,SANDYBRIDGE
+VPERMILPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 05 /r ib] AVX,SANDYBRIDGE
+VPERMILPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0c /r] AVX,SANDYBRIDGE
+VPERMILPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0c /r] AVX,SANDYBRIDGE
+VPERMILPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
+VPERMILPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
+VPERM2F128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib] AVX,SANDYBRIDGE
+VPEXTRB reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE,LONG
+VPEXTRB reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
+VPEXTRB mem8,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
+VPEXTRW reg64,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib] AVX,SANDYBRIDGE,LONG
+VPEXTRW reg32,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib] AVX,SANDYBRIDGE
+VPEXTRW reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE,LONG
+VPEXTRW reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE
+VPEXTRW mem16,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE
+VPEXTRD reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib] AVX,SANDYBRIDGE,LONG
+VPEXTRD rm32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib] AVX,SANDYBRIDGE
+VPEXTRQ rm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w1 16 /r ib] AVX,SANDYBRIDGE,LONG
+VPHADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 01 /r] AVX,SANDYBRIDGE
+VPHADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 02 /r] AVX,SANDYBRIDGE
+VPHADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 03 /r] AVX,SANDYBRIDGE
+VPHMINPOSUW xmmreg,xmmrm128 [rm: vex.128.66.0f38 41 /r] AVX,SANDYBRIDGE
+VPHSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 05 /r] AVX,SANDYBRIDGE
+VPHSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 06 /r] AVX,SANDYBRIDGE
+VPHSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 07 /r] AVX,SANDYBRIDGE
+VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
+VPINSRB xmmreg,xmmreg*,rm8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
+VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
+VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
+VPINSRW xmmreg,xmmreg*,rm16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
+VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
+VPINSRD xmmreg,xmmreg*,mem32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib] AVX,SANDYBRIDGE
+VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib] AVX,SANDYBRIDGE
+VPINSRQ xmmreg,xmmreg*,mem64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib] AVX,SANDYBRIDGE,LONG
+VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib] AVX,SANDYBRIDGE,LONG
+VPMADDWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f5 /r] AVX,SANDYBRIDGE
+VPMADDUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 04 /r] AVX,SANDYBRIDGE
+VPMAXSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3c /r] AVX,SANDYBRIDGE
+VPMAXSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ee /r] AVX,SANDYBRIDGE
+VPMAXSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3d /r] AVX,SANDYBRIDGE
+VPMAXUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f de /r] AVX,SANDYBRIDGE
+VPMAXUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3e /r] AVX,SANDYBRIDGE
+VPMAXUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3f /r] AVX,SANDYBRIDGE
+VPMINSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 38 /r] AVX,SANDYBRIDGE
+VPMINSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ea /r] AVX,SANDYBRIDGE
+VPMINSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 39 /r] AVX,SANDYBRIDGE
+VPMINUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f da /r] AVX,SANDYBRIDGE
+VPMINUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3a /r] AVX,SANDYBRIDGE
+VPMINUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3b /r] AVX,SANDYBRIDGE
+VPMOVMSKB reg64,xmmreg [rm: vex.128.66.0f d7 /r] AVX,SANDYBRIDGE,LONG
+VPMOVMSKB reg32,xmmreg [rm: vex.128.66.0f d7 /r] AVX,SANDYBRIDGE
+VPMOVSXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 20 /r] AVX,SANDYBRIDGE
+VPMOVSXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 21 /r] AVX,SANDYBRIDGE
+VPMOVSXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 22 /r] AVX,SANDYBRIDGE
+VPMOVSXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 23 /r] AVX,SANDYBRIDGE
+VPMOVSXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 24 /r] AVX,SANDYBRIDGE
+VPMOVSXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 25 /r] AVX,SANDYBRIDGE
+VPMOVZXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 30 /r] AVX,SANDYBRIDGE
+VPMOVZXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 31 /r] AVX,SANDYBRIDGE
+VPMOVZXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 32 /r] AVX,SANDYBRIDGE
+VPMOVZXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 33 /r] AVX,SANDYBRIDGE
+VPMOVZXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 34 /r] AVX,SANDYBRIDGE
+VPMOVZXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 35 /r] AVX,SANDYBRIDGE
+VPMULHUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e4 /r] AVX,SANDYBRIDGE
+VPMULHRSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0b /r] AVX,SANDYBRIDGE
+VPMULHW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e5 /r] AVX,SANDYBRIDGE
+VPMULLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d5 /r] AVX,SANDYBRIDGE
+VPMULLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 40 /r] AVX,SANDYBRIDGE
+VPMULUDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f4 /r] AVX,SANDYBRIDGE
+VPMULDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 28 /r] AVX,SANDYBRIDGE
+VPOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f eb /r] AVX,SANDYBRIDGE
+VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f6 /r] AVX,SANDYBRIDGE
+VPSHUFB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 00 /r] AVX,SANDYBRIDGE
+VPSHUFD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f 70 /r ib] AVX,SANDYBRIDGE
+VPSHUFHW xmmreg,xmmrm128,imm8 [rmi: vex.128.f3.0f 70 /r ib] AVX,SANDYBRIDGE
+VPSHUFLW xmmreg,xmmrm128,imm8 [rmi: vex.128.f2.0f 70 /r ib] AVX,SANDYBRIDGE
+VPSIGNB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 08 /r] AVX,SANDYBRIDGE
+VPSIGNW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 09 /r] AVX,SANDYBRIDGE
+VPSIGND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0a /r] AVX,SANDYBRIDGE
+VPSLLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /7 ib] AVX,SANDYBRIDGE
+VPSRLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /3 ib] AVX,SANDYBRIDGE
+VPSLLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f1 /r] AVX,SANDYBRIDGE
+VPSLLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /6 ib] AVX,SANDYBRIDGE
+VPSLLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f2 /r] AVX,SANDYBRIDGE
+VPSLLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /6 ib] AVX,SANDYBRIDGE
+VPSLLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f3 /r] AVX,SANDYBRIDGE
+VPSLLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /6 ib] AVX,SANDYBRIDGE
+VPSRAW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e1 /r] AVX,SANDYBRIDGE
+VPSRAW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /4 ib] AVX,SANDYBRIDGE
+VPSRAD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e2 /r] AVX,SANDYBRIDGE
+VPSRAD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /4 ib] AVX,SANDYBRIDGE
+VPSRLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d1 /r] AVX,SANDYBRIDGE
+VPSRLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /2 ib] AVX,SANDYBRIDGE
+VPSRLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d2 /r] AVX,SANDYBRIDGE
+VPSRLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /2 ib] AVX,SANDYBRIDGE
+VPSRLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d3 /r] AVX,SANDYBRIDGE
+VPSRLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /2 ib] AVX,SANDYBRIDGE
+VPTEST xmmreg,xmmrm128 [rm: vex.128.66.0f38 17 /r] AVX,SANDYBRIDGE
+VPTEST ymmreg,ymmrm256 [rm: vex.256.66.0f38 17 /r] AVX,SANDYBRIDGE
+VPSUBB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f8 /r] AVX,SANDYBRIDGE
+VPSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f9 /r] AVX,SANDYBRIDGE
+VPSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fa /r] AVX,SANDYBRIDGE
+VPSUBQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fb /r] AVX,SANDYBRIDGE
+VPSUBSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e8 /r] AVX,SANDYBRIDGE
+VPSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e9 /r] AVX,SANDYBRIDGE
+VPSUBUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d8 /r] AVX,SANDYBRIDGE
+VPSUBUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d9 /r] AVX,SANDYBRIDGE
+VPUNPCKHBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 68 /r] AVX,SANDYBRIDGE
+VPUNPCKHWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 69 /r] AVX,SANDYBRIDGE
+VPUNPCKHDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6a /r] AVX,SANDYBRIDGE
+VPUNPCKHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6d /r] AVX,SANDYBRIDGE
+VPUNPCKLBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 60 /r] AVX,SANDYBRIDGE
+VPUNPCKLWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 61 /r] AVX,SANDYBRIDGE
+VPUNPCKLDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 62 /r] AVX,SANDYBRIDGE
+VPUNPCKLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6c /r] AVX,SANDYBRIDGE
+VPXOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ef /r] AVX,SANDYBRIDGE
+VRCPPS xmmreg,xmmrm128 [rm: vex.128.0f 53 /r] AVX,SANDYBRIDGE
+VRCPPS ymmreg,ymmrm256 [rm: vex.256.0f 53 /r] AVX,SANDYBRIDGE
+VRCPSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 53 /r] AVX,SANDYBRIDGE
+VRSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 52 /r] AVX,SANDYBRIDGE
+VRSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 52 /r] AVX,SANDYBRIDGE
+VRSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 52 /r] AVX,SANDYBRIDGE
+VROUNDPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 09 /r ib] AVX,SANDYBRIDGE
+VROUNDPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 09 /r ib] AVX,SANDYBRIDGE
+VROUNDPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 08 /r ib] AVX,SANDYBRIDGE
+VROUNDPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 08 /r ib] AVX,SANDYBRIDGE
+VROUNDSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.128.66.0f3a 0b /r ib] AVX,SANDYBRIDGE
+VROUNDSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 0a /r ib] AVX,SANDYBRIDGE
+VSHUFPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c6 /r ib] AVX,SANDYBRIDGE
+VSHUFPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c6 /r ib] AVX,SANDYBRIDGE
+VSHUFPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c6 /r ib] AVX,SANDYBRIDGE
+VSHUFPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c6 /r ib] AVX,SANDYBRIDGE
+VSQRTPD xmmreg,xmmrm128 [rm: vex.128.66.0f 51 /r] AVX,SANDYBRIDGE
+VSQRTPD ymmreg,ymmrm256 [rm: vex.256.66.0f 51 /r] AVX,SANDYBRIDGE
+VSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 51 /r] AVX,SANDYBRIDGE
+VSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 51 /r] AVX,SANDYBRIDGE
+VSQRTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 51 /r] AVX,SANDYBRIDGE
+VSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 51 /r] AVX,SANDYBRIDGE
+VSTMXCSR mem32 [m: vex.128.0f ae /3] AVX,SANDYBRIDGE
+VSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5c /r] AVX,SANDYBRIDGE
+VSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5c /r] AVX,SANDYBRIDGE
+VSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5c /r] AVX,SANDYBRIDGE
+VSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5c /r] AVX,SANDYBRIDGE
+VSUBSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5c /r] AVX,SANDYBRIDGE
+VSUBSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5c /r] AVX,SANDYBRIDGE
+VTESTPS xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0e /r] AVX,SANDYBRIDGE
+VTESTPS ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0e /r] AVX,SANDYBRIDGE
+VTESTPD xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0f /r] AVX,SANDYBRIDGE
+VTESTPD ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0f /r] AVX,SANDYBRIDGE
+VUCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2e /r] AVX,SANDYBRIDGE
+VUCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2e /r] AVX,SANDYBRIDGE
+VUNPCKHPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 15 /r] AVX,SANDYBRIDGE
+VUNPCKHPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 15 /r] AVX,SANDYBRIDGE
+VUNPCKHPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 15 /r] AVX,SANDYBRIDGE
+VUNPCKHPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 15 /r] AVX,SANDYBRIDGE
+VUNPCKLPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 14 /r] AVX,SANDYBRIDGE
+VUNPCKLPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 14 /r] AVX,SANDYBRIDGE
+VUNPCKLPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 14 /r] AVX,SANDYBRIDGE
+VUNPCKLPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 14 /r] AVX,SANDYBRIDGE
+VXORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 57 /r] AVX,SANDYBRIDGE
+VXORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 57 /r] AVX,SANDYBRIDGE
+VXORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 57 /r] AVX,SANDYBRIDGE
+VXORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 57 /r] AVX,SANDYBRIDGE
+VZEROALL void [ vex.256.0f.w0 77] AVX,SANDYBRIDGE
+VZEROUPPER void [ vex.128.0f.w0 77] AVX,SANDYBRIDGE
+
+;# Intel Carry-Less Multiplication instructions (CLMUL)
+PCLMULLQLQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 00] SSE,WESTMERE
+PCLMULHQLQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 01] SSE,WESTMERE
+PCLMULLQHQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 10] SSE,WESTMERE
+PCLMULHQHQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 11] SSE,WESTMERE
+PCLMULQDQ xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a 44 /r ib] SSE,WESTMERE
+
+;# Intel AVX Carry-Less Multiplication instructions (CLMUL)
+VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 00] AVX,SANDYBRIDGE
+VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 01] AVX,SANDYBRIDGE
+VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 10] AVX,SANDYBRIDGE
+VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 11] AVX,SANDYBRIDGE
+VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 44 /r ib] AVX,SANDYBRIDGE
+
+;# Intel Fused Multiply-Add instructions (FMA)
+VFMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE
+VFMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE
+VFMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE
+VFMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE
+VFMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE
+VFMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE
+VFMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE
+VFMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE
+VFMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE
+VFMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE
+VFMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE
+VFMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE
+VFMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE
+VFMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE
+VFMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE
+VFMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE
+VFMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE
+VFMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE
+VFMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE
+VFMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE
+VFMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE
+VFMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE
+VFMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE
+VFMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE
+VFMADDSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE
+VFMADDSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE
+VFMADDSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE
+VFMADDSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE
+VFMADDSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE
+VFMADDSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE
+VFMADDSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE
+VFMADDSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE
+VFMADDSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE
+VFMADDSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE
+VFMADDSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE
+VFMADDSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE
+VFMADDSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE
+VFMADDSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE
+VFMADDSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE
+VFMADDSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE
+VFMADDSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE
+VFMADDSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE
+VFMADDSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE
+VFMADDSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE
+VFMADDSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE
+VFMADDSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE
+VFMADDSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE
+VFMADDSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE
+VFMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE
+VFMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE
+VFMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE
+VFMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE
+VFMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE
+VFMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE
+VFMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE
+VFMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE
+VFMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE
+VFMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE
+VFMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE
+VFMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE
+VFMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE
+VFMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE
+VFMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE
+VFMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE
+VFMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE
+VFMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE
+VFMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE
+VFMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE
+VFMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE
+VFMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE
+VFMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE
+VFMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE
+VFMSUBADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE
+VFMSUBADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE
+VFMSUBADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE
+VFMSUBADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE
+VFMSUBADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE
+VFMSUBADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE
+VFMSUBADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE
+VFMSUBADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE
+VFMSUBADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE
+VFMSUBADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE
+VFMSUBADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE
+VFMSUBADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE
+VFMSUBADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE
+VFMSUBADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE
+VFMSUBADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE
+VFMSUBADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE
+VFMSUBADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE
+VFMSUBADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE
+VFMSUBADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE
+VFMSUBADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE
+VFMSUBADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE
+VFMSUBADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE
+VFMSUBADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE
+VFMSUBADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE
+VFNMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE
+VFNMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE
+VFNMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE
+VFNMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE
+VFNMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE
+VFNMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE
+VFNMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE
+VFNMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE
+VFNMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE
+VFNMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE
+VFNMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE
+VFNMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE
+VFNMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE
+VFNMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE
+VFNMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE
+VFNMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE
+VFNMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE
+VFNMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE
+VFNMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE
+VFNMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE
+VFNMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE
+VFNMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE
+VFNMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE
+VFNMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE
+VFNMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE
+VFNMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE
+VFNMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE
+VFNMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE
+VFNMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE
+VFNMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE
+VFNMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE
+VFNMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE
+VFNMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE
+VFNMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE
+VFNMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE
+VFNMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE
+VFNMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE
+VFNMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE
+VFNMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE
+VFNMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE
+VFNMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE
+VFNMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE
+VFNMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE
+VFNMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE
+VFNMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE
+VFNMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE
+VFNMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE
+VFNMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE
+VFMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE
+VFMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE
+VFMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE
+VFMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE
+VFMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE
+VFMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE
+VFMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE
+VFMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE
+VFMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE
+VFMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE
+VFMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE
+VFMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE
+VFMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE
+VFMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE
+VFMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE
+VFMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE
+VFMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE
+VFMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE
+VFMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE
+VFMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE
+VFMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE
+VFMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE
+VFMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE
+VFMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE
+VFNMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE
+VFNMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE
+VFNMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE
+VFNMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE
+VFNMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE
+VFNMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE
+VFNMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE
+VFNMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE
+VFNMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE
+VFNMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE
+VFNMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE
+VFNMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE
+VFNMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE
+VFNMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE
+VFNMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE
+VFNMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE
+VFNMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE
+VFNMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE
+VFNMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE
+VFNMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE
+VFNMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE
+VFNMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE
+VFNMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE
+VFNMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE
+
+;# Intel post-32 nm processor instructions
+;
+; Per AVX spec revision 7, document 319433-007
+RDFSBASE reg32 [m: norexw f3 0f ae /0] LONG,FUTURE
+RDFSBASE reg64 [m: o64 f3 0f ae /0] LONG,FUTURE
+RDGSBASE reg32 [m: norexw f3 0f ae /1] LONG,FUTURE
+RDGSBASE reg64 [m: o64 f3 0f ae /1] LONG,FUTURE
+RDRAND reg16 [m: o16 0f c7 /6] FUTURE
+RDRAND reg32 [m: o32 0f c7 /6] FUTURE
+RDRAND reg64 [m: o64 0f c7 /6] LONG,FUTURE
+WRFSBASE reg32 [m: norexw f3 0f ae /2] LONG,FUTURE
+WRFSBASE reg64 [m: o64 f3 0f ae /2] LONG,FUTURE
+WRGSBASE reg32 [m: norexw f3 0f ae /3] LONG,FUTURE
+WRGSBASE reg64 [m: o64 f3 0f ae /3] LONG,FUTURE
+VCVTPH2PS ymmreg,xmmrm128 [rm: vex.256.66.0f38.w0 13 /r] AVX,FUTURE
+VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r] AVX,FUTURE
+VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib] AVX,FUTURE
+VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib] AVX,FUTURE
+
+; Per AVX spec revision 13, document 319433-013
+ADCX reg32,rm32 [rm: norexw 66 0f 38 f6 /r] FUTURE
+ADCX reg64,rm64 [rm: o64 66 0f 38 f6 /r] LONG,FUTURE
+ADOX reg32,rm32 [rm: norexw f3 0f 38 f6 /r] FUTURE
+ADOX reg64,rm64 [rm: o64 f3 0f 38 f6 /r] LONG,FUTURE
+RDSEED reg16 [m: o16 0f c7 /7] FUTURE
+RDSEED reg32 [m: o32 0f c7 /7] FUTURE
+RDSEED reg64 [m: o64 0f c7 /7] LONG,FUTURE
+
+; Per AVX spec revision 14, document 319433-014
+CLAC void [ 0f 01 ca] PRIV,FUTURE
+STAC void [ 0f 01 cb] PRIV,FUTURE
+
+;# VIA (Centaur) security instructions
+XSTORE void [ 0f a7 c0] PENT,CYRIX
+XCRYPTECB void [ mustrep 0f a7 c8] PENT,CYRIX
+XCRYPTCBC void [ mustrep 0f a7 d0] PENT,CYRIX
+XCRYPTCTR void [ mustrep 0f a7 d8] PENT,CYRIX
+XCRYPTCFB void [ mustrep 0f a7 e0] PENT,CYRIX
+XCRYPTOFB void [ mustrep 0f a7 e8] PENT,CYRIX
+MONTMUL void [ mustrep 0f a6 c0] PENT,CYRIX
+XSHA1 void [ mustrep 0f a6 c8] PENT,CYRIX
+XSHA256 void [ mustrep 0f a6 d0] PENT,CYRIX
+
+;# AMD Lightweight Profiling (LWP) instructions
+;
+; based on pub number 43724 revision 3.04 date August 2009
+;
+; updated to match draft from AMD developer (patch has been
+; sent to binutils
+; 2010-03-22 Quentin Neill <quentin.neill@amd.com>
+; Sebastian Pop <sebastian.pop@amd.com>
+;
+LLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /0] AMD,386
+LLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /0] AMD,X64
+
+SLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /1] AMD,386
+SLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /1] AMD,X64
+
+LWPVAL reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /1 id] AMD,386
+LWPVAL reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /1 id] AMD,X64
+
+LWPINS reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /0 id] AMD,386
+LWPINS reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /0 id] AMD,X64
+
+;# AMD XOP and FMA4 instructions (SSE5)
+;
+; based on pub number 43479 revision 3.04 dated November 2009
+;
+VFMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 69 /r /is4] AMD,SSE5
+VFMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 69 /r /is4] AMD,SSE5
+VFMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 69 /r /is4] AMD,SSE5
+VFMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 69 /r /is4] AMD,SSE5
+
+VFMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 68 /r /is4] AMD,SSE5
+VFMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 68 /r /is4] AMD,SSE5
+VFMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 68 /r /is4] AMD,SSE5
+VFMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 68 /r /is4] AMD,SSE5
+
+VFMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6b /r /is4] AMD,SSE5
+VFMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6b /r /is4] AMD,SSE5
+
+VFMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6a /r /is4] AMD,SSE5
+VFMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6a /r /is4] AMD,SSE5
+
+VFMADDSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5d /r /is4] AMD,SSE5
+VFMADDSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5d /r /is4] AMD,SSE5
+VFMADDSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5d /r /is4] AMD,SSE5
+VFMADDSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5d /r /is4] AMD,SSE5
+
+VFMADDSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5c /r /is4] AMD,SSE5
+VFMADDSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5c /r /is4] AMD,SSE5
+VFMADDSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5c /r /is4] AMD,SSE5
+VFMADDSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5c /r /is4] AMD,SSE5
+
+VFMSUBADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5f /r /is4] AMD,SSE5
+VFMSUBADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5f /r /is4] AMD,SSE5
+VFMSUBADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5f /r /is4] AMD,SSE5
+VFMSUBADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5f /r /is4] AMD,SSE5
+
+VFMSUBADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5e /r /is4] AMD,SSE5
+VFMSUBADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5e /r /is4] AMD,SSE5
+VFMSUBADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5e /r /is4] AMD,SSE5
+VFMSUBADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5e /r /is4] AMD,SSE5
+
+VFMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6d /r /is4] AMD,SSE5
+VFMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6d /r /is4] AMD,SSE5
+VFMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6d /r /is4] AMD,SSE5
+VFMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6d /r /is4] AMD,SSE5
+
+VFMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6c /r /is4] AMD,SSE5
+VFMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6c /r /is4] AMD,SSE5
+VFMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6c /r /is4] AMD,SSE5
+VFMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6c /r /is4] AMD,SSE5
+
+VFMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6f /r /is4] AMD,SSE5
+VFMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6f /r /is4] AMD,SSE5
+
+VFMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6e /r /is4] AMD,SSE5
+VFMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6e /r /is4] AMD,SSE5
+
+VFNMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 79 /r /is4] AMD,SSE5
+VFNMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 79 /r /is4] AMD,SSE5
+VFNMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 79 /r /is4] AMD,SSE5
+VFNMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 79 /r /is4] AMD,SSE5
+
+VFNMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 78 /r /is4] AMD,SSE5
+VFNMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 78 /r /is4] AMD,SSE5
+VFNMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 78 /r /is4] AMD,SSE5
+VFNMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 78 /r /is4] AMD,SSE5
+
+VFNMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7b /r /is4] AMD,SSE5
+VFNMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7b /r /is4] AMD,SSE5
+
+VFNMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7a /r /is4] AMD,SSE5
+VFNMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7a /r /is4] AMD,SSE5
+
+VFNMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7d /r /is4] AMD,SSE5
+VFNMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7d /r /is4] AMD,SSE5
+VFNMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7d /r /is4] AMD,SSE5
+VFNMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7d /r /is4] AMD,SSE5
+
+VFNMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7c /r /is4] AMD,SSE5
+VFNMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7c /r /is4] AMD,SSE5
+VFNMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7c /r /is4] AMD,SSE5
+VFNMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7c /r /is4] AMD,SSE5
+
+VFNMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7f /r /is4] AMD,SSE5
+VFNMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7f /r /is4] AMD,SSE5
+
+VFNMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7e /r /is4] AMD,SSE5
+VFNMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7e /r /is4] AMD,SSE5
+
+VFRCZPD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 81 /r] AMD,SSE5
+VFRCZPD ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 81 /r] AMD,SSE5
+
+VFRCZPS xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 80 /r] AMD,SSE5
+VFRCZPS ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 80 /r] AMD,SSE5
+
+VFRCZSD xmmreg,xmmrm64* [rm: xop.m9.w0.l0.p0 83 /r] AMD,SSE5
+
+VFRCZSS xmmreg,xmmrm32* [rm: xop.m9.w0.l0.p0 82 /r] AMD,SSE5
+;
+; fixed: spec mention imm[7:4] though it should be /is4 even in spec
+VPCMOV xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a2 /r /is4] AMD,SSE5
+VPCMOV ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: xop.m8.w0.nds.l1.p0 a2 /r /is4] AMD,SSE5
+VPCMOV xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a2 /r /is4] AMD,SSE5
+VPCMOV ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: xop.m8.w1.nds.l1.p0 a2 /r /is4] AMD,SSE5
+
+VPCOMB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cc /r ib] AMD,SSE5
+VPCOMD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ce /r ib] AMD,SSE5
+VPCOMQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cf /r ib] AMD,SSE5
+;
+; fixed: spec mention only 3 operands in mnemonics
+VPCOMUB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ec /r ib] AMD,SSE5
+VPCOMUD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ee /r ib] AMD,SSE5
+VPCOMUQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ef /r ib] AMD,SSE5
+;
+; fixed: spec point wrong VPCOMB in mnemonic
+VPCOMUW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ed /r ib] AMD,SSE5
+VPCOMW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cd /r ib] AMD,SSE5
+
+VPHADDBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c2 /r] AMD,SSE5
+VPHADDBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c3 /r] AMD,SSE5
+VPHADDBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c1 /r] AMD,SSE5
+VPHADDDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 cb /r] AMD,SSE5
+;
+; fixed: spec has ymmreg for l0
+VPHADDUBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d2 /r] AMD,SSE5
+VPHADDUBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d3 /r] AMD,SSE5
+;
+; fixed: spec has VPHADDUBWD
+VPHADDUBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d1 /r] AMD,SSE5
+;
+; fixed: opcode db
+VPHADDUDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 db /r] AMD,SSE5
+VPHADDUWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d6 /r] AMD,SSE5
+VPHADDUWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d7 /r] AMD,SSE5
+;
+; fixed: spec has ymmreg for l0
+VPHADDWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c6 /r] AMD,SSE5
+;
+; fixed: spec has d7 opcode
+VPHADDWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c7 /r] AMD,SSE5
+
+VPHSUBBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e1 /r] AMD,SSE5
+VPHSUBDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e3 /r] AMD,SSE5
+VPHSUBWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e2 /r] AMD,SSE5
+
+VPMACSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9e /r /is4] AMD,SSE5
+;
+; fixed: spec has 97,9f opcodes here
+VPMACSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9f /r /is4] AMD,SSE5
+VPMACSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 97 /r /is4] AMD,SSE5
+VPMACSSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8e /r /is4] AMD,SSE5
+VPMACSSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8f /r /is4] AMD,SSE5
+VPMACSSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 87 /r /is4] AMD,SSE5
+VPMACSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 86 /r /is4] AMD,SSE5
+VPMACSSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 85 /r /is4] AMD,SSE5
+VPMACSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 96 /r /is4] AMD,SSE5
+VPMACSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 95 /r /is4] AMD,SSE5
+VPMADCSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a6 /r /is4] AMD,SSE5
+VPMADCSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 b6 /r /is4] AMD,SSE5
+
+VPPERM xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a3 /r /is4] AMD,SSE5
+VPPERM xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a3 /r /is4] AMD,SSE5
+
+VPROTB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 90 /r] AMD,SSE5
+VPROTB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 90 /r] AMD,SSE5
+;
+; fixed: spec point xmmreg instead of reg/mem
+VPROTB xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c0 /r ib] AMD,SSE5
+
+VPROTD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 92 /r] AMD,SSE5
+VPROTD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 92 /r] AMD,SSE5
+;
+; fixed: spec error /r is needed
+VPROTD xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c2 /r ib] AMD,SSE5
+VPROTQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 93 /r] AMD,SSE5
+VPROTQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 93 /r] AMD,SSE5
+;
+; fixed: spec error /r is needed
+VPROTQ xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c3 /r ib] AMD,SSE5
+VPROTW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 91 /r] AMD,SSE5
+VPROTW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 91 /r] AMD,SSE5
+VPROTW xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c1 /r ib] AMD,SSE5
+
+VPSHAB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 98 /r] AMD,SSE5
+VPSHAB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 98 /r] AMD,SSE5
+
+VPSHAD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9a /r] AMD,SSE5
+VPSHAD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9a /r] AMD,SSE5
+
+VPSHAQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9b /r] AMD,SSE5
+VPSHAQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9b /r] AMD,SSE5
+
+VPSHAW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 99 /r] AMD,SSE5
+VPSHAW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 99 /r] AMD,SSE5
+
+VPSHLB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 94 /r] AMD,SSE5
+VPSHLB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 94 /r] AMD,SSE5
+
+;
+; fixed: spec has ymmreg for l0
+VPSHLD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 96 /r] AMD,SSE5
+VPSHLD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 96 /r] AMD,SSE5
+
+VPSHLQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 97 /r] AMD,SSE5
+VPSHLQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 97 /r] AMD,SSE5
+
+VPSHLW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 95 /r] AMD,SSE5
+VPSHLW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 95 /r] AMD,SSE5
+
+;# Intel AVX2 instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+VMPSADBW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 42 /r ib] FUTURE,AVX2
+VPABSB ymmreg,ymmrm256 [rm: vex.256.66.0f38 1c /r] FUTURE,AVX2
+VPABSW ymmreg,ymmrm256 [rm: vex.256.66.0f38 1d /r] FUTURE,AVX2
+VPABSD ymmreg,ymmrm256 [rm: vex.256.66.0f38 1e /r] FUTURE,AVX2
+VPACKSSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 63 /r] FUTURE,AVX2
+VPACKSSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6b /r] FUTURE,AVX2
+VPACKUSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 2b /r] FUTURE,AVX2
+VPACKUSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 67 /r] FUTURE,AVX2
+VPADDB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fc /r] FUTURE,AVX2
+VPADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fd /r] FUTURE,AVX2
+VPADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fe /r] FUTURE,AVX2
+VPADDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d4 /r] FUTURE,AVX2
+VPADDSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ec /r] FUTURE,AVX2
+VPADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ed /r] FUTURE,AVX2
+VPADDUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dc /r] FUTURE,AVX2
+VPADDUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dd /r] FUTURE,AVX2
+VPALIGNR ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0f /r ib] FUTURE,AVX2
+VPAND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f db /r] FUTURE,AVX2
+VPANDN ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f df /r] FUTURE,AVX2
+VPAVGB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e0 /r] FUTURE,AVX2
+VPAVGW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e3 /r] FUTURE,AVX2
+VPBLENDVB ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a 4c /r /is4] FUTURE,AVX2
+VPBLENDW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0e /r ib] FUTURE,AVX2
+VPCMPEQB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 74 /r] FUTURE,AVX2
+VPCMPEQW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 75 /r] FUTURE,AVX2
+VPCMPEQD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 76 /r] FUTURE,AVX2
+VPCMPEQQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 29 /r] FUTURE,AVX2
+VPCMPGTB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 64 /r] FUTURE,AVX2
+VPCMPGTW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 65 /r] FUTURE,AVX2
+VPCMPGTD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 66 /r] FUTURE,AVX2
+VPCMPGTQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 37 /r] FUTURE,AVX2
+VPHADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 01 /r] FUTURE,AVX2
+VPHADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 02 /r] FUTURE,AVX2
+VPHADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 03 /r] FUTURE,AVX2
+VPHSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 05 /r] FUTURE,AVX2
+VPHSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 06 /r] FUTURE,AVX2
+VPHSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 07 /r] FUTURE,AVX2
+VPMADDUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 04 /r] FUTURE,AVX2
+VPMADDWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f5 /r] FUTURE,AVX2
+VPMAXSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3c /r] FUTURE,AVX2
+VPMAXSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ee /r] FUTURE,AVX2
+VPMAXSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3d /r] FUTURE,AVX2
+VPMAXUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f de /r] FUTURE,AVX2
+VPMAXUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3e /r] FUTURE,AVX2
+VPMAXUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3f /r] FUTURE,AVX2
+VPMINSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 38 /r] FUTURE,AVX2
+VPMINSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ea /r] FUTURE,AVX2
+VPMINSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 39 /r] FUTURE,AVX2
+VPMINUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f da /r] FUTURE,AVX2
+VPMINUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3a /r] FUTURE,AVX2
+VPMINUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3b /r] FUTURE,AVX2
+VPMOVMSKB reg32,ymmreg [rm: vex.256.66.0f d7 /r] FUTURE,AVX2
+VPMOVMSKB reg64,ymmreg [rm: vex.256.66.0f d7 /r] FUTURE,AVX2
+VPMOVSXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 20 /r] FUTURE,AVX2
+VPMOVSXBD ymmreg,mem64 [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
+VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
+VPMOVSXBQ ymmreg,mem32 [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
+VPMOVSXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
+VPMOVSXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 23 /r] FUTURE,AVX2
+VPMOVSXWQ ymmreg,mem64 [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
+VPMOVSXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
+VPMOVSXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 25 /r] FUTURE,AVX2
+VPMOVZXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 30 /r] FUTURE,AVX2
+VPMOVZXBD ymmreg,mem64 [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
+VPMOVZXBD ymmreg,xmmreg [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
+VPMOVZXBQ ymmreg,mem32 [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
+VPMOVZXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
+VPMOVZXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 33 /r] FUTURE,AVX2
+VPMOVZXWQ ymmreg,mem64 [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
+VPMOVZXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
+VPMOVZXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 35 /r] FUTURE,AVX2
+VPMULDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 28 /r] FUTURE,AVX2
+VPMULHRSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0b /r] FUTURE,AVX2
+VPMULHUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e4 /r] FUTURE,AVX2
+VPMULHW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e5 /r] FUTURE,AVX2
+VPMULLW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d5 /r] FUTURE,AVX2
+VPMULLD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 40 /r] FUTURE,AVX2
+VPMULUDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f4 /r] FUTURE,AVX2
+VPOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f eb /r] FUTURE,AVX2
+VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f6 /r] FUTURE,AVX2
+VPSHUFB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 00 /r] FUTURE,AVX2
+VPSHUFD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f 70 /r ib] FUTURE,AVX2
+VPSHUFHW ymmreg,ymmrm256,imm8 [rmi: vex.256.f3.0f 70 /r ib] FUTURE,AVX2
+VPSHUFLW ymmreg,ymmrm256,imm8 [rmi: vex.256.f2.0f 70 /r ib] FUTURE,AVX2
+VPSIGNB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 08 /r] FUTURE,AVX2
+VPSIGNW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 09 /r] FUTURE,AVX2
+VPSIGND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0a /r] FUTURE,AVX2
+VPSLLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /7 ib] FUTURE,AVX2
+VPSLLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f1 /r] FUTURE,AVX2
+VPSLLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /6 ib] FUTURE,AVX2
+VPSLLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f2 /r] FUTURE,AVX2
+VPSLLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /6 ib] FUTURE,AVX2
+VPSLLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f3 /r] FUTURE,AVX2
+VPSLLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /6 ib] FUTURE,AVX2
+VPSRAW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e1 /r] FUTURE,AVX2
+VPSRAW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /4 ib] FUTURE,AVX2
+VPSRAD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e2 /r] FUTURE,AVX2
+VPSRAD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /4 ib] FUTURE,AVX2
+VPSRLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /3 ib] FUTURE,AVX2
+VPSRLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d1 /r] FUTURE,AVX2
+VPSRLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /2 ib] FUTURE,AVX2
+VPSRLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d2 /r] FUTURE,AVX2
+VPSRLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /2 ib] FUTURE,AVX2
+VPSRLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d3 /r] FUTURE,AVX2
+VPSRLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f.wig 73 /2 ib] FUTURE,AVX2
+VPSUBB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f8 /r] FUTURE,AVX2
+VPSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f9 /r] FUTURE,AVX2
+VPSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fa /r] FUTURE,AVX2
+VPSUBQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fb /r] FUTURE,AVX2
+VPSUBSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e8 /r] FUTURE,AVX2
+VPSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e9 /r] FUTURE,AVX2
+VPSUBUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d8 /r] FUTURE,AVX2
+VPSUBUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d9 /r] FUTURE,AVX2
+VPUNPCKHBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 68 /r] FUTURE,AVX2
+VPUNPCKHWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 69 /r] FUTURE,AVX2
+VPUNPCKHDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6a /r] FUTURE,AVX2
+VPUNPCKHQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6d /r] FUTURE,AVX2
+VPUNPCKLBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 60 /r] FUTURE,AVX2
+VPUNPCKLWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 61 /r] FUTURE,AVX2
+VPUNPCKLDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 62 /r] FUTURE,AVX2
+VPUNPCKLQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6c /r] FUTURE,AVX2
+VPXOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ef /r] FUTURE,AVX2
+VMOVNTDQA ymmreg,mem256 [rm: vex.256.66.0f38 2a /r] FUTURE,AVX2
+VBROADCASTSS xmmreg,xmmreg [rm: vex.128.66.0f38.w0 18 /r] FUTURE,AVX2
+VBROADCASTSS ymmreg,xmmreg [rm: vex.256.66.0f38.w0 18 /r] FUTURE,AVX2
+VBROADCASTSD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 19 /r] FUTURE,AVX2
+VBROADCASTI128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 5a /r] FUTURE,AVX2
+VPBLENDD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w0 02 /r ib] FUTURE,AVX2
+VPBLENDD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 02 /r ib] FUTURE,AVX2
+VPBROADCASTB xmmreg,mem8 [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB xmmreg,xmmreg [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB ymmreg,mem8 [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB ymmreg,xmmreg [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTW xmmreg,mem16 [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW xmmreg,xmmreg [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW ymmreg,mem16 [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW ymmreg,xmmreg [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTD xmmreg,mem32 [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD xmmreg,xmmreg [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD ymmreg,mem32 [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTQ xmmreg,mem64 [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ xmmreg,xmmreg [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ ymmreg,mem64 [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ ymmreg,xmmreg [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
+
+VPERMD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 36 /r] FUTURE,AVX2
+VPERMPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 01 /r ib] FUTURE,AVX2
+VPERMPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 16 /r] FUTURE,AVX2
+VPERMQ ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 00 /r ib] FUTURE,AVX2
+VPERM2I128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 46 /r ib] FUTURE,AVX2
+VEXTRACTI128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 39 /r ib] FUTURE,AVX2
+
+VINSERTI128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 38 /r ib] FUTURE,AVX2
+VPMASKMOVD xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w0 8c /r] FUTURE,AVX2
+VPMASKMOVD ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w0 8c /r] FUTURE,AVX2
+VPMASKMOVQ xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w1 8c /r] FUTURE,AVX2
+VPMASKMOVQ ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w1 8c /r] FUTURE,AVX2
+
+VPMASKMOVD mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w0 8e /r] FUTURE,AVX2
+VPMASKMOVD mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w0 8e /r] FUTURE,AVX2
+VPMASKMOVQ mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w1 8e /r] FUTURE,AVX2
+VPMASKMOVQ mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w1 8e /r] FUTURE,AVX2
+
+VPSLLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 47 /r] FUTURE,AVX2
+VPSLLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 47 /r] FUTURE,AVX2
+VPSLLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 47 /r] FUTURE,AVX2
+VPSLLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 47 /r] FUTURE,AVX2
+
+VPSRAVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 46 /r] FUTURE,AVX2
+VPSRAVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 46 /r] FUTURE,AVX2
+
+VPSRLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 45 /r] FUTURE,AVX2
+VPSRLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 45 /r] FUTURE,AVX2
+VPSRLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 45 /r] FUTURE,AVX2
+VPSRLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 45 /r] FUTURE,AVX2
+
+VGATHERDPD xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 92 /r] FUTURE,AVX2
+VGATHERQPD xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 93 /r] FUTURE,AVX2
+VGATHERDPD ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
+VGATHERQPD ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 93 /r] FUTURE,AVX2
+
+VGATHERDPS xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 92 /r] FUTURE,AVX2
+VGATHERQPS xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 93 /r] FUTURE,AVX2
+VGATHERDPS ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 92 /r] FUTURE,AVX2
+VGATHERQPS xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 93 /r] FUTURE,AVX2
+
+VPGATHERDD xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 90 /r] FUTURE,AVX2
+VPGATHERQD xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 91 /r] FUTURE,AVX2
+VPGATHERDD ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 90 /r] FUTURE,AVX2
+VPGATHERQD xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 91 /r] FUTURE,AVX2
+
+VPGATHERDQ xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 90 /r] FUTURE,AVX2
+VPGATHERQQ xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 91 /r] FUTURE,AVX2
+VPGATHERDQ ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 90 /r] FUTURE,AVX2
+VPGATHERQQ ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 91 /r] FUTURE,AVX2
+
+;# Transactional Synchronization Extensions (TSX)
+XABORT imm [i: c6 f8 ib] FUTURE,RTM
+XABORT imm8 [i: c6 f8 ib] FUTURE,RTM
+XBEGIN imm [i: odf c7 f8 rel] FUTURE,RTM
+XBEGIN imm|near [i: odf c7 f8 rel] FUTURE,RTM,ND
+XBEGIN imm16 [i: o16 c7 f8 rel] FUTURE,RTM,NOLONG
+XBEGIN imm16|near [i: o16 c7 f8 rel] FUTURE,RTM,NOLONG,ND
+XBEGIN imm32 [i: o32 c7 f8 rel] FUTURE,RTM,NOLONG
+XBEGIN imm32|near [i: o32 c7 f8 rel] FUTURE,RTM,NOLONG,ND
+XBEGIN imm64 [i: o64nw c7 f8 rel] FUTURE,RTM,LONG
+XBEGIN imm64|near [i: o64nw c7 f8 rel] FUTURE,RTM,LONG,ND
+XEND void [ 0f 01 d5] FUTURE,RTM
+XTEST void [ 0f 01 d6] FUTURE,HLE,RTM
+
+;# Intel BMI1 and BMI2 instructions, AMD TBM instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1
+ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] LONG,FUTURE,BMI1
+BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1
+BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] LONG,FUTURE,BMI1
+BEXTR reg32,rm32,imm32 [rmi: xop.m10.lz.w0 10 /r id] FUTURE,TBM
+BEXTR reg64,rm64,imm32 [rmi: xop.m10.lz.w1 10 /r id] LONG,FUTURE,TBM
+BLCI reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /6] FUTURE,TBM
+BLCI reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /6] LONG,FUTURE,TBM
+BLCIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /5] FUTURE,TBM
+BLCIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /5] LONG,FUTURE,TBM
+BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1
+BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3] LONG,FUTURE,BMI1
+BLSIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /6] FUTURE,TBM
+BLSIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /6] LONG,FUTURE,TBM
+BLCFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /1] FUTURE,TBM
+BLCFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /1] LONG,FUTURE,TBM
+BLSFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /2] FUTURE,TBM
+BLSFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /2] LONG,FUTURE,TBM
+BLCMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /1] FUTURE,TBM
+BLCMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /1] LONG,FUTURE,TBM
+BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1
+BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2] LONG,FUTURE,BMI1
+BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1
+BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1] LONG,FUTURE,BMI1
+BLCS reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /3] FUTURE,TBM
+BLCS reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /3] LONG,FUTURE,TBM
+BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2
+BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2
+MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] LONG,FUTURE,BMI2
+PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2
+PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2
+PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2
+RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib] LONG,FUTURE,BMI2
+SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2
+SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] LONG,FUTURE,BMI2
+SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2
+SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] LONG,FUTURE,BMI2
+SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2
+SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] LONG,FUTURE,BMI2
+TZCNT reg16,rm16 [rm: o16 f3i 0f bc /r] FUTURE,BMI1
+TZCNT reg32,rm32 [rm: o32 f3i 0f bc /r] FUTURE,BMI1
+TZCNT reg64,rm64 [rm: o64 f3i 0f bc /r] LONG,FUTURE,BMI1
+TZMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /4] FUTURE,TBM
+TZMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /4] LONG,FUTURE,TBM
+T1MSKC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /7] FUTURE,TBM
+T1MSKC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /7] LONG,FUTURE,TBM
+
+PREFETCHWT1 mem8 [m: 0f 0d /2 ] PREFETCHWT1,FUTURE
+
+; MPX instructions
+BNDMK bndreg,mem [rm: f3 0f 1b /r ] MPX,MIB,FUTURE
+BNDCL bndreg,mem [rm: f3 0f 1a /r ] MPX,FUTURE
+BNDCL bndreg,reg32 [rm: f3 0f 1a /r ] MPX,NOLONG,FUTURE
+BNDCL bndreg,reg64 [rm: o64nw f3 0f 1a /r ] MPX,LONG,FUTURE
+BNDCU bndreg,mem [rm: f2 0f 1a /r ] MPX,FUTURE
+BNDCU bndreg,reg32 [rm: f2 0f 1a /r ] MPX,NOLONG,FUTURE
+BNDCU bndreg,reg64 [rm: o64nw f2 0f 1a /r ] MPX,LONG,FUTURE
+BNDCN bndreg,mem [rm: f2 0f 1b /r ] MPX,FUTURE
+BNDCN bndreg,reg32 [rm: f2 0f 1b /r ] MPX,NOLONG,FUTURE
+BNDCN bndreg,reg64 [rm: o64nw f2 0f 1b /r ] MPX,LONG,FUTURE
+BNDMOV bndreg,bndreg [rm: 66 0f 1a /r ] MPX,FUTURE
+BNDMOV bndreg,mem [rm: 66 0f 1a /r ] MPX,FUTURE
+BNDMOV bndreg,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE
+BNDMOV mem,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE
+BNDLDX bndreg,mem [rm: 0f 1a /r ] MPX,MIB,FUTURE
+BNDLDX bndreg,mem,reg32 [rmx: 0f 1a /r ] MPX,MIB,NOLONG,FUTURE
+BNDLDX bndreg,mem,reg64 [rmx: 0f 1a /r ] MPX,MIB,LONG,FUTURE
+BNDSTX mem,bndreg [mr: 0f 1b /r ] MPX,MIB,FUTURE
+BNDSTX mem,reg32,bndreg [mxr: 0f 1b /r ] MPX,MIB,NOLONG,FUTURE
+BNDSTX mem,reg64,bndreg [mxr: 0f 1b /r ] MPX,MIB,LONG,FUTURE
+BNDSTX mem,bndreg,reg32 [mrx: 0f 1b /r ] MPX,MIB,NOLONG,FUTURE
+BNDSTX mem,bndreg,reg64 [mrx: 0f 1b /r ] MPX,MIB,LONG,FUTURE
+
+;# MJC PUBLIC BEGIN
+KADDB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 4a /r ] FUTURE
+KADDD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 4a /r ] FUTURE
+KADDQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 4a /r ] FUTURE
+KADDW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 4a /r ] FUTURE
+KANDB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 41 /r ] FUTURE
+KANDD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 41 /r ] FUTURE
+KANDNB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 42 /r ] FUTURE
+KANDND kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 42 /r ] FUTURE
+KANDNQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 42 /r ] FUTURE
+KANDNW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 42 /r ] FUTURE
+KANDQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 41 /r ] FUTURE
+KANDW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 41 /r ] FUTURE
+KMOVB kreg,krm8 [rm: vex.l0.66.0f.w0 90 /r ] FUTURE
+KMOVB mem8,kreg [mr: vex.l0.66.0f.w0 91 /r ] FUTURE
+KMOVB kreg,reg32 [rm: vex.l0.66.0f.w0 92 /r ] FUTURE
+KMOVB reg32,kreg [rm: vex.l0.66.0f.w0 93 /r ] FUTURE
+KMOVD kreg,krm32 [rm: vex.l0.66.0f.w1 90 /r ] FUTURE
+KMOVD mem32,kreg [mr: vex.l0.66.0f.w1 91 /r ] FUTURE
+KMOVD kreg,reg32 [rm: vex.l0.f2.0f.w0 92 /r ] FUTURE
+KMOVD reg32,kreg [rm: vex.l0.f2.0f.w0 93 /r ] FUTURE
+KMOVQ kreg,krm64 [rm: vex.l0.0f.w1 90 /r ] FUTURE
+KMOVQ mem64,kreg [mr: vex.l0.0f.w1 91 /r ] FUTURE
+KMOVQ kreg,reg64 [rm: vex.l0.f2.0f.w1 92 /r ] FUTURE
+KMOVQ reg64,kreg [rm: vex.l0.f2.0f.w1 93 /r ] FUTURE
+KMOVW kreg,krm16 [rm: vex.l0.0f.w0 90 /r ] FUTURE
+KMOVW mem16,kreg [mr: vex.l0.0f.w0 91 /r ] FUTURE
+KMOVW kreg,reg32 [rm: vex.l0.0f.w0 92 /r ] FUTURE
+KMOVW reg32,kreg [rm: vex.l0.0f.w0 93 /r ] FUTURE
+KNOTB kreg,kreg [rm: vex.l0.66.0f.w0 44 /r ] FUTURE
+KNOTD kreg,kreg [rm: vex.l0.66.0f.w1 44 /r ] FUTURE
+KNOTQ kreg,kreg [rm: vex.l0.0f.w1 44 /r ] FUTURE
+KNOTW kreg,kreg [rm: vex.l0.0f.w0 44 /r ] FUTURE
+KORB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 45 /r ] FUTURE
+KORD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 45 /r ] FUTURE
+KORQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 45 /r ] FUTURE
+KORTESTB kreg,kreg [rm: vex.l0.66.0f.w0 98 /r ] FUTURE
+KORTESTD kreg,kreg [rm: vex.l0.66.0f.w1 98 /r ] FUTURE
+KORTESTQ kreg,kreg [rm: vex.l0.0f.w1 98 /r ] FUTURE
+KORTESTW kreg,kreg [rm: vex.l0.0f.w0 98 /r ] FUTURE
+KORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 45 /r ] FUTURE
+KSHIFTLB kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] FUTURE
+KSHIFTLD kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] FUTURE
+KSHIFTLQ kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] FUTURE
+KSHIFTLW kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] FUTURE
+KSHIFTRB kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] FUTURE
+KSHIFTRD kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] FUTURE
+KSHIFTRQ kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] FUTURE
+KSHIFTRW kreg,kreg,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] FUTURE
+KTESTB kreg,kreg [rm: vex.l0.66.0f.w0 99 /r ] FUTURE
+KTESTD kreg,kreg [rm: vex.l0.66.0f.w1 99 /r ] FUTURE
+KTESTQ kreg,kreg [rm: vex.l0.0f.w1 99 /r ] FUTURE
+KTESTW kreg,kreg [rm: vex.l0.0f.w0 99 /r ] FUTURE
+KUNPCKBW kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 4b /r ] FUTURE
+KUNPCKDQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 4b /r ] FUTURE
+KUNPCKWD kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 4b /r ] FUTURE
+KXNORB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 46 /r ] FUTURE
+KXNORD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 46 /r ] FUTURE
+KXNORQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 46 /r ] FUTURE
+KXNORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 46 /r ] FUTURE
+KXORB kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w0 47 /r ] FUTURE
+KXORD kreg,kreg,kreg [rvm: vex.nds.l1.66.0f.w1 47 /r ] FUTURE
+KXORQ kreg,kreg,kreg [rvm: vex.nds.l1.0f.w1 47 /r ] FUTURE
+KXORW kreg,kreg,kreg [rvm: vex.nds.l1.0f.w0 47 /r ] FUTURE
+SHA1MSG1 xmmreg,xmmrm128 [rm: 0f 38 c9 /r ] SHA,FUTURE
+SHA1MSG2 xmmreg,xmmrm128 [rm: 0f 38 ca /r ] SHA,FUTURE
+SHA1NEXTE xmmreg,xmmrm128 [rm: 0f 38 c8 /r ] SHA,FUTURE
+SHA1RNDS4 xmmreg,xmmrm128,imm8 [rmi: 0f 3a cc /r ib ] SHA,FUTURE
+SHA256MSG1 xmmreg,xmmrm128 [rm: 0f 38 cc /r ] SHA,FUTURE
+SHA256MSG2 xmmreg,xmmrm128 [rm: 0f 38 cd /r ] SHA,FUTURE
+SHA256RNDS2 xmmreg,xmmrm128,xmm0 [rm-: 0f 38 cb /r ] SHA,FUTURE
+VADDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 58 /r ] AVX512VL,AVX512,FUTURE
+VADDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 58 /r ] AVX512VL,AVX512,FUTURE
+VADDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 58 /r ] AVX512,FUTURE
+VADDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VADDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VADDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 58 /r ] AVX512,FUTURE
+VADDSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 58 /r ] AVX512,FUTURE
+VADDSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.f3.0f.w0 58 /r ] AVX512,FUTURE
+VALIGND xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 03 /r ib ] AVX512VL,AVX512,FUTURE
+VALIGND ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 03 /r ib ] AVX512VL,AVX512,FUTURE
+VALIGND zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 03 /r ib ] AVX512,FUTURE
+VALIGNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 03 /r ib ] AVX512VL,AVX512,FUTURE
+VALIGNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 03 /r ib ] AVX512VL,AVX512,FUTURE
+VALIGNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 03 /r ib ] AVX512,FUTURE
+VANDNPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDNPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDNPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 55 /r ] AVX512DQ,FUTURE
+VANDNPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDNPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDNPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 55 /r ] AVX512DQ,FUTURE
+VANDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 54 /r ] AVX512DQ,FUTURE
+VANDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE
+VANDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 54 /r ] AVX512DQ,FUTURE
+VBLENDMPD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 65 /r ] AVX512VL,AVX512,FUTURE
+VBLENDMPD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 65 /r ] AVX512VL,AVX512,FUTURE
+VBLENDMPD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 65 /r ] AVX512,FUTURE
+VBLENDMPS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 65 /r ] AVX512VL,AVX512,FUTURE
+VBLENDMPS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 65 /r ] AVX512VL,AVX512,FUTURE
+VBLENDMPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 65 /r ] AVX512,FUTURE
+VBROADCASTF32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 19 /r ] AVX512VL,AVX512DQ,FUTURE
+VBROADCASTF32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 19 /r ] AVX512DQ,FUTURE
+VBROADCASTF32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 1a /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTF32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 1a /r ] AVX512,FUTURE
+VBROADCASTF32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 1b /r ] AVX512DQ,FUTURE
+VBROADCASTF64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 1a /r ] AVX512VL,AVX512DQ,FUTURE
+VBROADCASTF64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 1a /r ] AVX512DQ,FUTURE
+VBROADCASTF64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 1b /r ] AVX512,FUTURE
+VBROADCASTI32X2 xmmreg|mask|z,xmmrm64 [rm:t2: evex.128.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 59 /r ] AVX512DQ,FUTURE
+VBROADCASTI32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 5a /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTI32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 5a /r ] AVX512,FUTURE
+VBROADCASTI32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 5b /r ] AVX512DQ,FUTURE
+VBROADCASTI64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 5a /r ] AVX512VL,AVX512DQ,FUTURE
+VBROADCASTI64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 5a /r ] AVX512DQ,FUTURE
+VBROADCASTI64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 5b /r ] AVX512,FUTURE
+VBROADCASTSD ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 19 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSD zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE
+VBROADCASTSD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 19 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE
+VBROADCASTSS xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 18 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSS ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 18 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSS zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE
+VBROADCASTSS xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 18 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSS ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 18 /r ] AVX512VL,AVX512,FUTURE
+VBROADCASTSS zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE
+VCMPPD kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r ib ] AVX512VL,AVX512,FUTURE
+VCMPPD kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r ib ] AVX512VL,AVX512,FUTURE
+VCMPPD kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r ib ] AVX512,FUTURE
+VCMPPS kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c2 /r ib ] AVX512VL,AVX512,FUTURE
+VCMPPS kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c2 /r ib ] AVX512VL,AVX512,FUTURE
+VCMPPS kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.0f.w0 c2 /r ib ] AVX512,FUTURE
+VCMPSD kreg|mask,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.f2.0f.w1 c2 /r ib ] AVX512,FUTURE
+VCMPSS kreg|mask,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.f3.0f.w0 c2 /r ib ] AVX512,FUTURE
+VCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.128.66.0f.w1 2f /r ] AVX512,FUTURE
+VCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.128.0f.w0 2f /r ] AVX512,FUTURE
+VCOMPRESSPD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE
+VCOMPRESSPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE
+VCOMPRESSPS mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPS mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPS mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE
+VCOMPRESSPS xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPS ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8a /r ] AVX512VL,AVX512,FUTURE
+VCOMPRESSPS zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE
+VCVTDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 e6 /r ] AVX512,FUTURE
+VCVTDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 5b /r ] AVX512,FUTURE
+VCVTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2DQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 e6 /r ] AVX512,FUTURE
+VCVTPD2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 5a /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 5a /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 5a /r ] AVX512,FUTURE
+VCVTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPD2QQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 7b /r ] AVX512DQ,FUTURE
+VCVTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 79 /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 79 /r ] AVX512VL,AVX512,FUTURE
+VCVTPD2UDQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 79 /r ] AVX512,FUTURE
+VCVTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPD2UQQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 79 /r ] AVX512DQ,FUTURE
+VCVTPH2PS xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VCVTPH2PS ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VCVTPH2PS zmmreg|mask|z,ymmrm256|sae [rm:hvm: evex.512.66.0f38.w0 13 /r ] AVX512,FUTURE
+VCVTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2DQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.0f.w0 5b /r ] AVX512,FUTURE
+VCVTPS2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.0f.w0 5a /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.0f.w0 5a /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2PD zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.0f.w0 5a /r ] AVX512,FUTURE
+VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512VL,AVX512,FUTURE
+VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512VL,AVX512,FUTURE
+VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE
+VCVTPS2PH mem64|mask,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512VL,AVX512,FUTURE
+VCVTPS2PH mem128|mask,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512VL,AVX512,FUTURE
+VCVTPS2PH mem256|mask,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE
+VCVTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPS2QQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 7b /r ] AVX512DQ,FUTURE
+VCVTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 79 /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 79 /r ] AVX512VL,AVX512,FUTURE
+VCVTPS2UDQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 79 /r ] AVX512,FUTURE
+VCVTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTPS2UQQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 79 /r ] AVX512DQ,FUTURE
+VCVTQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 e6 /r ] AVX512DQ,FUTURE
+VCVTQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 5b /r ] AVX512DQ,FUTURE
+VCVTSD2SI reg32,xmmrm64|er [rm:t1f64: evex.128.f2.0f.w0 2d /r ] AVX512,FUTURE
+VCVTSD2SI reg64,xmmrm64|er [rm:t1f64: evex.128.f2.0f.w1 2d /r ] AVX512,FUTURE
+VCVTSD2SS xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 5a /r ] AVX512,FUTURE
+VCVTSD2USI reg32,xmmrm64|er [rm:t1f64: evex.128.f2.0f.w0 79 /r ] AVX512,FUTURE
+VCVTSD2USI reg64,xmmrm64|er [rm:t1f64: evex.128.f2.0f.w1 79 /r ] AVX512,FUTURE
+VCVTSI2SD xmmreg,xmmreg|er,rm32 [rvm:t1s: evex.nds.128.f2.0f.w0 2a /r ] AVX512,FUTURE
+VCVTSI2SD xmmreg,xmmreg|er,rm64 [rvm:t1s: evex.nds.128.f2.0f.w1 2a /r ] AVX512,FUTURE
+VCVTSI2SS xmmreg,xmmreg|er,rm32 [rvm:t1s: evex.nds.128.f3.0f.w0 2a /r ] AVX512,FUTURE
+VCVTSI2SS xmmreg,xmmreg|er,rm64 [rvm:t1s: evex.nds.128.f3.0f.w1 2a /r ] AVX512,FUTURE
+VCVTSS2SD xmmreg|mask|z,xmmreg,xmmrm32|sae [rvm:t1s: evex.nds.128.f3.0f.w0 5a /r ] AVX512,FUTURE
+VCVTSS2SI reg32,xmmrm32|er [rm:t1f32: evex.128.f3.0f.w0 2d /r ] AVX512,FUTURE
+VCVTSS2SI reg64,xmmrm32|er [rm:t1f32: evex.128.f3.0f.w1 2d /r ] AVX512,FUTURE
+VCVTSS2USI reg32,xmmrm32|er [rm:t1f32: evex.128.f3.0f.w0 79 /r ] AVX512,FUTURE
+VCVTSS2USI reg64,xmmrm32|er [rm:t1f32: evex.128.f3.0f.w1 79 /r ] AVX512,FUTURE
+VCVTTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 e6 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPD2DQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 e6 /r ] AVX512,FUTURE
+VCVTTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2QQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 7a /r ] AVX512DQ,FUTURE
+VCVTTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 78 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 78 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPD2UDQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.0f.w1 78 /r ] AVX512,FUTURE
+VCVTTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPD2UQQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 78 /r ] AVX512DQ,FUTURE
+VCVTTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f3.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f3.0f.w0 5b /r ] AVX512VL,AVX512,FUTURE
+VCVTTPS2DQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.f3.0f.w0 5b /r ] AVX512,FUTURE
+VCVTTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2QQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 7a /r ] AVX512DQ,FUTURE
+VCVTTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 78 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 78 /r ] AVX512VL,AVX512,FUTURE
+VCVTTPS2UDQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.0f.w0 78 /r ] AVX512,FUTURE
+VCVTTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTTPS2UQQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 78 /r ] AVX512DQ,FUTURE
+VCVTTSD2SI reg32,xmmrm64|sae [rm:t1f64: evex.128.f2.0f.w0 2c /r ] AVX512,FUTURE
+VCVTTSD2SI reg64,xmmrm64|sae [rm:t1f64: evex.128.f2.0f.w1 2c /r ] AVX512,FUTURE
+VCVTTSD2USI reg32,xmmrm64|sae [rm:t1f64: evex.128.f2.0f.w0 78 /r ] AVX512,FUTURE
+VCVTTSD2USI reg64,xmmrm64|sae [rm:t1f64: evex.128.f2.0f.w1 78 /r ] AVX512,FUTURE
+VCVTTSS2SI reg32,xmmrm32|sae [rm:t1f32: evex.128.f3.0f.w0 2c /r ] AVX512,FUTURE
+VCVTTSS2SI reg64,xmmrm32|sae [rm:t1f32: evex.128.f3.0f.w1 2c /r ] AVX512,FUTURE
+VCVTTSS2USI reg32,xmmrm32|sae [rm:t1f32: evex.128.f3.0f.w0 78 /r ] AVX512,FUTURE
+VCVTTSS2USI reg64,xmmrm32|sae [rm:t1f32: evex.128.f3.0f.w1 78 /r ] AVX512,FUTURE
+VCVTUDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 7a /r ] AVX512VL,AVX512,FUTURE
+VCVTUDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 7a /r ] AVX512VL,AVX512,FUTURE
+VCVTUDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 7a /r ] AVX512,FUTURE
+VCVTUDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.0f.w0 7a /r ] AVX512VL,AVX512,FUTURE
+VCVTUDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.0f.w0 7a /r ] AVX512VL,AVX512,FUTURE
+VCVTUDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.f2.0f.w0 7a /r ] AVX512,FUTURE
+VCVTUQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 7a /r ] AVX512DQ,FUTURE
+VCVTUQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE
+VCVTUQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 7a /r ] AVX512DQ,FUTURE
+VCVTUSI2SD xmmreg,xmmreg|er,rm32 [rvm:t1s: evex.nds.128.f2.0f.w0 7b /r ] AVX512,FUTURE
+VCVTUSI2SD xmmreg,xmmreg|er,rm64 [rvm:t1s: evex.nds.128.f2.0f.w1 7b /r ] AVX512,FUTURE
+VCVTUSI2SS xmmreg,xmmreg|er,rm32 [rvm:t1s: evex.nds.128.f3.0f.w0 7b /r ] AVX512,FUTURE
+VCVTUSI2SS xmmreg,xmmreg|er,rm64 [rvm:t1s: evex.nds.128.f3.0f.w1 7b /r ] AVX512,FUTURE
+VDBPSADBW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE
+VDBPSADBW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE
+VDBPSADBW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 42 /r ib ] AVX512BW,FUTURE
+VDIVPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5e /r ] AVX512VL,AVX512,FUTURE
+VDIVPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5e /r ] AVX512VL,AVX512,FUTURE
+VDIVPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5e /r ] AVX512,FUTURE
+VDIVPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5e /r ] AVX512VL,AVX512,FUTURE
+VDIVPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5e /r ] AVX512VL,AVX512,FUTURE
+VDIVPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5e /r ] AVX512,FUTURE
+VDIVSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 5e /r ] AVX512,FUTURE
+VDIVSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.f3.0f.w0 5e /r ] AVX512,FUTURE
+VEXP2PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 c8 /r ] AVX512ER,FUTURE
+VEXP2PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 c8 /r ] AVX512ER,FUTURE
+VEXPANDPD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE
+VEXPANDPD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE
+VEXPANDPS xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPS ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPS zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE
+VEXPANDPS xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPS ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512VL,AVX512,FUTURE
+VEXPANDPS zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE
+VEXTRACTF32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 19 /r ib ] AVX512VL,AVX512,FUTURE
+VEXTRACTF32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE
+VEXTRACTF32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 19 /r ib ] AVX512VL,AVX512,FUTURE
+VEXTRACTF32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE
+VEXTRACTF32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE
+VEXTRACTF32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE
+VEXTRACTF64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VEXTRACTF64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE
+VEXTRACTF64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VEXTRACTF64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE
+VEXTRACTF64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE
+VEXTRACTF64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE
+VEXTRACTI32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 39 /r ib ] AVX512VL,AVX512,FUTURE
+VEXTRACTI32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE
+VEXTRACTI32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 39 /r ib ] AVX512VL,AVX512,FUTURE
+VEXTRACTI32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE
+VEXTRACTI32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE
+VEXTRACTI32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE
+VEXTRACTI64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VEXTRACTI64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE
+VEXTRACTI64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VEXTRACTI64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE
+VEXTRACTI64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE
+VEXTRACTI64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE
+VEXTRACTPS reg32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE
+VEXTRACTPS reg64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE
+VEXTRACTPS mem32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE
+VFIXUPIMMPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 54 /r ib ] AVX512VL,AVX512,FUTURE
+VFIXUPIMMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 54 /r ib ] AVX512VL,AVX512,FUTURE
+VFIXUPIMMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 54 /r ib ] AVX512,FUTURE
+VFIXUPIMMPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 54 /r ib ] AVX512VL,AVX512,FUTURE
+VFIXUPIMMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 54 /r ib ] AVX512VL,AVX512,FUTURE
+VFIXUPIMMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 54 /r ib ] AVX512,FUTURE
+VFIXUPIMMSD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 55 /r ib ] AVX512,FUTURE
+VFIXUPIMMSS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 55 /r ib ] AVX512,FUTURE
+VFMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 98 /r ] AVX512VL,AVX512,FUTURE
+VFMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 98 /r ] AVX512VL,AVX512,FUTURE
+VFMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 98 /r ] AVX512,FUTURE
+VFMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 98 /r ] AVX512VL,AVX512,FUTURE
+VFMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 98 /r ] AVX512VL,AVX512,FUTURE
+VFMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 98 /r ] AVX512,FUTURE
+VFMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 99 /r ] AVX512,FUTURE
+VFMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 99 /r ] AVX512,FUTURE
+VFMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a8 /r ] AVX512,FUTURE
+VFMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a8 /r ] AVX512,FUTURE
+VFMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 a9 /r ] AVX512,FUTURE
+VFMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 a9 /r ] AVX512,FUTURE
+VFMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b8 /r ] AVX512,FUTURE
+VFMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b8 /r ] AVX512VL,AVX512,FUTURE
+VFMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b8 /r ] AVX512,FUTURE
+VFMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 b9 /r ] AVX512,FUTURE
+VFMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 b9 /r ] AVX512,FUTURE
+VFMADDSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 96 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 96 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 96 /r ] AVX512,FUTURE
+VFMADDSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 96 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 96 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 96 /r ] AVX512,FUTURE
+VFMADDSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a6 /r ] AVX512,FUTURE
+VFMADDSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a6 /r ] AVX512,FUTURE
+VFMADDSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b6 /r ] AVX512,FUTURE
+VFMADDSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b6 /r ] AVX512VL,AVX512,FUTURE
+VFMADDSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b6 /r ] AVX512,FUTURE
+VFMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9a /r ] AVX512VL,AVX512,FUTURE
+VFMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9a /r ] AVX512VL,AVX512,FUTURE
+VFMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9a /r ] AVX512,FUTURE
+VFMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9a /r ] AVX512VL,AVX512,FUTURE
+VFMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9a /r ] AVX512VL,AVX512,FUTURE
+VFMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9a /r ] AVX512,FUTURE
+VFMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 9b /r ] AVX512,FUTURE
+VFMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 9b /r ] AVX512,FUTURE
+VFMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 aa /r ] AVX512VL,AVX512,FUTURE
+VFMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 aa /r ] AVX512VL,AVX512,FUTURE
+VFMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 aa /r ] AVX512,FUTURE
+VFMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 aa /r ] AVX512VL,AVX512,FUTURE
+VFMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 aa /r ] AVX512VL,AVX512,FUTURE
+VFMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 aa /r ] AVX512,FUTURE
+VFMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 ab /r ] AVX512,FUTURE
+VFMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 ab /r ] AVX512,FUTURE
+VFMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ba /r ] AVX512VL,AVX512,FUTURE
+VFMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ba /r ] AVX512VL,AVX512,FUTURE
+VFMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ba /r ] AVX512,FUTURE
+VFMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ba /r ] AVX512VL,AVX512,FUTURE
+VFMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ba /r ] AVX512VL,AVX512,FUTURE
+VFMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ba /r ] AVX512,FUTURE
+VFMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 bb /r ] AVX512,FUTURE
+VFMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 bb /r ] AVX512,FUTURE
+VFMSUBADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 97 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 97 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 97 /r ] AVX512,FUTURE
+VFMSUBADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 97 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 97 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 97 /r ] AVX512,FUTURE
+VFMSUBADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a7 /r ] AVX512,FUTURE
+VFMSUBADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a7 /r ] AVX512,FUTURE
+VFMSUBADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b7 /r ] AVX512,FUTURE
+VFMSUBADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b7 /r ] AVX512VL,AVX512,FUTURE
+VFMSUBADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b7 /r ] AVX512,FUTURE
+VFNMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9c /r ] AVX512VL,AVX512,FUTURE
+VFNMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9c /r ] AVX512VL,AVX512,FUTURE
+VFNMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9c /r ] AVX512,FUTURE
+VFNMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9c /r ] AVX512VL,AVX512,FUTURE
+VFNMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9c /r ] AVX512VL,AVX512,FUTURE
+VFNMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9c /r ] AVX512,FUTURE
+VFNMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 9d /r ] AVX512,FUTURE
+VFNMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 9d /r ] AVX512,FUTURE
+VFNMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ac /r ] AVX512VL,AVX512,FUTURE
+VFNMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ac /r ] AVX512VL,AVX512,FUTURE
+VFNMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ac /r ] AVX512,FUTURE
+VFNMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ac /r ] AVX512VL,AVX512,FUTURE
+VFNMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ac /r ] AVX512VL,AVX512,FUTURE
+VFNMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ac /r ] AVX512,FUTURE
+VFNMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 ad /r ] AVX512,FUTURE
+VFNMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 ad /r ] AVX512,FUTURE
+VFNMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 bc /r ] AVX512VL,AVX512,FUTURE
+VFNMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 bc /r ] AVX512VL,AVX512,FUTURE
+VFNMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 bc /r ] AVX512,FUTURE
+VFNMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 bc /r ] AVX512VL,AVX512,FUTURE
+VFNMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 bc /r ] AVX512VL,AVX512,FUTURE
+VFNMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 bc /r ] AVX512,FUTURE
+VFNMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 bd /r ] AVX512,FUTURE
+VFNMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 bd /r ] AVX512,FUTURE
+VFNMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9e /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9e /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9e /r ] AVX512,FUTURE
+VFNMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9e /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9e /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9e /r ] AVX512,FUTURE
+VFNMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 9f /r ] AVX512,FUTURE
+VFNMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 9f /r ] AVX512,FUTURE
+VFNMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ae /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ae /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ae /r ] AVX512,FUTURE
+VFNMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ae /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ae /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ae /r ] AVX512,FUTURE
+VFNMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 af /r ] AVX512,FUTURE
+VFNMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 af /r ] AVX512,FUTURE
+VFNMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 be /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 be /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 be /r ] AVX512,FUTURE
+VFNMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 be /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 be /r ] AVX512VL,AVX512,FUTURE
+VFNMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 be /r ] AVX512,FUTURE
+VFNMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 bf /r ] AVX512,FUTURE
+VFNMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 bf /r ] AVX512,FUTURE
+VFPCLASSPD kreg|mask,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPD kreg|mask,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPD kreg|mask,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 66 /r ib ] AVX512DQ,FUTURE
+VFPCLASSPS kreg|mask,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPS kreg|mask,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VFPCLASSPS kreg|mask,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 66 /r ib ] AVX512DQ,FUTURE
+VFPCLASSSD kreg|mask,xmmrm64,imm8 [rmi:t1s: evex.128.66.0f3a.w1 67 /r ib ] AVX512DQ,FUTURE
+VFPCLASSSS kreg|mask,xmmrm32,imm8 [rmi:t1s: evex.128.66.0f3a.w0 67 /r ib ] AVX512DQ,FUTURE
+VGATHERDPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 92 /r ] AVX512VL,AVX512,FUTURE
+VGATHERDPD ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 92 /r ] AVX512VL,AVX512,FUTURE
+VGATHERDPD zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 92 /r ] AVX512,FUTURE
+VGATHERDPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 92 /r ] AVX512VL,AVX512,FUTURE
+VGATHERDPS ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 92 /r ] AVX512VL,AVX512,FUTURE
+VGATHERDPS zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 92 /r ] AVX512,FUTURE
+VGATHERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /1 ] AVX512PF,FUTURE
+VGATHERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /1 ] AVX512PF,FUTURE
+VGATHERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /1 ] AVX512PF,FUTURE
+VGATHERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /1 ] AVX512PF,FUTURE
+VGATHERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /2 ] AVX512PF,FUTURE
+VGATHERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /2 ] AVX512PF,FUTURE
+VGATHERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /2 ] AVX512PF,FUTURE
+VGATHERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /2 ] AVX512PF,FUTURE
+VGATHERQPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 93 /r ] AVX512VL,AVX512,FUTURE
+VGATHERQPD ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 93 /r ] AVX512VL,AVX512,FUTURE
+VGATHERQPD zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 93 /r ] AVX512,FUTURE
+VGATHERQPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 93 /r ] AVX512VL,AVX512,FUTURE
+VGATHERQPS xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 93 /r ] AVX512VL,AVX512,FUTURE
+VGATHERQPS ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 93 /r ] AVX512,FUTURE
+VGETEXPPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 42 /r ] AVX512VL,AVX512,FUTURE
+VGETEXPPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 42 /r ] AVX512VL,AVX512,FUTURE
+VGETEXPPD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 42 /r ] AVX512,FUTURE
+VGETEXPPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 42 /r ] AVX512VL,AVX512,FUTURE
+VGETEXPPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 42 /r ] AVX512VL,AVX512,FUTURE
+VGETEXPPS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 42 /r ] AVX512,FUTURE
+VGETEXPSD xmmreg|mask|z,xmmreg,xmmrm64|sae [rvm:t1s: evex.nds.128.66.0f38.w1 43 /r ] AVX512,FUTURE
+VGETEXPSS xmmreg|mask|z,xmmreg,xmmrm32|sae [rvm:t1s: evex.nds.128.66.0f38.w0 43 /r ] AVX512,FUTURE
+VGETMANTPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 26 /r ib ] AVX512VL,AVX512,FUTURE
+VGETMANTPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 26 /r ib ] AVX512VL,AVX512,FUTURE
+VGETMANTPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 26 /r ib ] AVX512,FUTURE
+VGETMANTPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 26 /r ib ] AVX512VL,AVX512,FUTURE
+VGETMANTPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 26 /r ib ] AVX512VL,AVX512,FUTURE
+VGETMANTPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 26 /r ib ] AVX512,FUTURE
+VGETMANTSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 27 /r ib ] AVX512,FUTURE
+VGETMANTSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 27 /r ib ] AVX512,FUTURE
+VINSERTF32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 18 /r ib ] AVX512VL,AVX512,FUTURE
+VINSERTF32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 18 /r ib ] AVX512,FUTURE
+VINSERTF32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 1a /r ib ] AVX512DQ,FUTURE
+VINSERTF64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 18 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VINSERTF64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 18 /r ib ] AVX512DQ,FUTURE
+VINSERTF64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 1a /r ib ] AVX512,FUTURE
+VINSERTI32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 38 /r ib ] AVX512VL,AVX512,FUTURE
+VINSERTI32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 38 /r ib ] AVX512,FUTURE
+VINSERTI32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 3a /r ib ] AVX512DQ,FUTURE
+VINSERTI64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 38 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VINSERTI64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 38 /r ib ] AVX512DQ,FUTURE
+VINSERTI64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 3a /r ib ] AVX512,FUTURE
+VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 21 /r ib ] AVX512,FUTURE
+VMAXPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5f /r ] AVX512VL,AVX512,FUTURE
+VMAXPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5f /r ] AVX512VL,AVX512,FUTURE
+VMAXPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5f /r ] AVX512,FUTURE
+VMAXPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5f /r ] AVX512VL,AVX512,FUTURE
+VMAXPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5f /r ] AVX512VL,AVX512,FUTURE
+VMAXPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5f /r ] AVX512,FUTURE
+VMAXSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.128.f2.0f.w1 5f /r ] AVX512,FUTURE
+VMAXSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.128.f3.0f.w0 5f /r ] AVX512,FUTURE
+VMINPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5d /r ] AVX512VL,AVX512,FUTURE
+VMINPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5d /r ] AVX512VL,AVX512,FUTURE
+VMINPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5d /r ] AVX512,FUTURE
+VMINPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5d /r ] AVX512VL,AVX512,FUTURE
+VMINPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5d /r ] AVX512VL,AVX512,FUTURE
+VMINPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5d /r ] AVX512,FUTURE
+VMINSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.128.f2.0f.w1 5d /r ] AVX512,FUTURE
+VMINSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.128.f3.0f.w0 5d /r ] AVX512,FUTURE
+VMOVAPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 28 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 28 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 28 /r ] AVX512,FUTURE
+VMOVAPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE
+VMOVAPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE
+VMOVAPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 28 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 28 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 28 /r ] AVX512,FUTURE
+VMOVAPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 29 /r ] AVX512,FUTURE
+VMOVAPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 29 /r ] AVX512VL,AVX512,FUTURE
+VMOVAPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 29 /r ] AVX512,FUTURE
+VMOVD xmmreg,rm32 [rm:t1s: evex.128.66.0f.w0 6e /r ] AVX512,FUTURE
+VMOVD rm32,xmmreg [mr:t1s: evex.128.66.0f.w0 7e /r ] AVX512,FUTURE
+VMOVDDUP xmmreg|mask|z,xmmrm64 [rm:dup: evex.128.f2.0f.w1 12 /r ] AVX512VL,AVX512,FUTURE
+VMOVDDUP ymmreg|mask|z,ymmrm256 [rm:dup: evex.256.f2.0f.w1 12 /r ] AVX512VL,AVX512,FUTURE
+VMOVDDUP zmmreg|mask|z,zmmrm512 [rm:dup: evex.512.f2.0f.w1 12 /r ] AVX512,FUTURE
+VMOVDQA32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w0 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w0 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w0 6f /r ] AVX512,FUTURE
+VMOVDQA32 xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w0 7f /r ] AVX512,FUTURE
+VMOVDQA32 mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA32 mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w0 7f /r ] AVX512,FUTURE
+VMOVDQA64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 6f /r ] AVX512,FUTURE
+VMOVDQA64 xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 7f /r ] AVX512,FUTURE
+VMOVDQA64 mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQA64 mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 7f /r ] AVX512,FUTURE
+VMOVDQU16 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w1 6f /r ] AVX512BW,FUTURE
+VMOVDQU16 xmmreg|mask|z,xmmreg [mr: evex.128.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 ymmreg|mask|z,ymmreg [mr: evex.256.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 zmmreg|mask|z,zmmreg [mr: evex.512.f2.0f.w1 7f /r ] AVX512BW,FUTURE
+VMOVDQU16 mem128|mask,xmmreg [mr:fvm: evex.128.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 mem256|mask,ymmreg [mr:fvm: evex.256.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU16 mem512|mask,zmmreg [mr:fvm: evex.512.f2.0f.w1 7f /r ] AVX512BW,FUTURE
+VMOVDQU32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 6f /r ] AVX512,FUTURE
+VMOVDQU32 xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 ymmreg|mask|z,ymmreg [mr: evex.256.f3.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 zmmreg|mask|z,zmmreg [mr: evex.512.f3.0f.w0 7f /r ] AVX512,FUTURE
+VMOVDQU32 mem128|mask,xmmreg [mr:fvm: evex.128.f3.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 mem256|mask,ymmreg [mr:fvm: evex.256.f3.0f.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU32 mem512|mask,zmmreg [mr:fvm: evex.512.f3.0f.w0 7f /r ] AVX512,FUTURE
+VMOVDQU64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w1 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w1 6f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w1 6f /r ] AVX512,FUTURE
+VMOVDQU64 xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 ymmreg|mask|z,ymmreg [mr: evex.256.f3.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 zmmreg|mask|z,zmmreg [mr: evex.512.f3.0f.w1 7f /r ] AVX512,FUTURE
+VMOVDQU64 mem128|mask,xmmreg [mr:fvm: evex.128.f3.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 mem256|mask,ymmreg [mr:fvm: evex.256.f3.0f.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VMOVDQU64 mem512|mask,zmmreg [mr:fvm: evex.512.f3.0f.w1 7f /r ] AVX512,FUTURE
+VMOVDQU8 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w0 6f /r ] AVX512BW,FUTURE
+VMOVDQU8 xmmreg|mask|z,xmmreg [mr: evex.128.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 ymmreg|mask|z,ymmreg [mr: evex.256.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 zmmreg|mask|z,zmmreg [mr: evex.512.f2.0f.w0 7f /r ] AVX512BW,FUTURE
+VMOVDQU8 mem128|mask,xmmreg [mr:fvm: evex.128.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 mem256|mask,ymmreg [mr:fvm: evex.256.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE
+VMOVDQU8 mem512|mask,zmmreg [mr:fvm: evex.512.f2.0f.w0 7f /r ] AVX512BW,FUTURE
+VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE
+VMOVHPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 16 /r ] AVX512,FUTURE
+VMOVHPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 17 /r ] AVX512,FUTURE
+VMOVHPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE
+VMOVHPS mem64,xmmreg [mr:t2: evex.128.0f.w0 17 /r ] AVX512,FUTURE
+VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE
+VMOVLPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 12 /r ] AVX512,FUTURE
+VMOVLPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 13 /r ] AVX512,FUTURE
+VMOVLPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE
+VMOVLPS mem64,xmmreg [mr:t2: evex.128.0f.w0 13 /r ] AVX512,FUTURE
+VMOVNTDQ mem128,xmmreg [mr:fvm: evex.128.66.0f.w0 e7 /r ] AVX512VL,AVX512,FUTURE
+VMOVNTDQ mem256,ymmreg [mr:fvm: evex.256.66.0f.w0 e7 /r ] AVX512VL,AVX512,FUTURE
+VMOVNTDQ mem512,zmmreg [mr:fvm: evex.512.66.0f.w0 e7 /r ] AVX512,FUTURE
+VMOVNTDQA xmmreg,mem128 [rm:fvm: evex.128.66.0f38.w0 2a /r ] AVX512VL,AVX512,FUTURE
+VMOVNTDQA ymmreg,mem256 [rm:fvm: evex.256.66.0f38.w0 2a /r ] AVX512VL,AVX512,FUTURE
+VMOVNTDQA zmmreg,mem512 [rm:fvm: evex.512.66.0f38.w0 2a /r ] AVX512,FUTURE
+VMOVNTPD mem128,xmmreg [mr:fvm: evex.128.66.0f.w1 2b /r ] AVX512VL,AVX512,FUTURE
+VMOVNTPD mem256,ymmreg [mr:fvm: evex.256.66.0f.w1 2b /r ] AVX512VL,AVX512,FUTURE
+VMOVNTPD mem512,zmmreg [mr:fvm: evex.512.66.0f.w1 2b /r ] AVX512,FUTURE
+VMOVNTPS mem128,xmmreg [mr:fvm: evex.128.0f.w0 2b /r ] AVX512VL,AVX512,FUTURE
+VMOVNTPS mem256,ymmreg [mr:fvm: evex.256.0f.w0 2b /r ] AVX512VL,AVX512,FUTURE
+VMOVNTPS mem512,zmmreg [mr:fvm: evex.512.0f.w0 2b /r ] AVX512,FUTURE
+VMOVQ xmmreg,rm64 [rm:t1s: evex.128.66.0f.w1 6e /r ] AVX512,FUTURE
+VMOVQ rm64,xmmreg [mr:t1s: evex.128.66.0f.w1 7e /r ] AVX512,FUTURE
+VMOVQ xmmreg,xmmrm64 [rm:t1s: evex.128.f3.0f.w1 7e /r ] AVX512,FUTURE
+VMOVQ xmmrm64,xmmreg [mr:t1s: evex.128.66.0f.w1 d6 /r ] AVX512,FUTURE
+VMOVSD xmmreg|mask|z,mem64 [rm:t1s: evex.128.f2.0f.w1 10 /r ] AVX512,FUTURE
+VMOVSD mem64|mask,xmmreg [mr:t1s: evex.128.f2.0f.w1 11 /r ] AVX512,FUTURE
+VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.128.f2.0f.w1 10 /r ] AVX512,FUTURE
+VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.128.f2.0f.w1 11 /r ] AVX512,FUTURE
+VMOVSHDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 16 /r ] AVX512VL,AVX512,FUTURE
+VMOVSHDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 16 /r ] AVX512VL,AVX512,FUTURE
+VMOVSHDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 16 /r ] AVX512,FUTURE
+VMOVSLDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VMOVSLDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VMOVSLDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 12 /r ] AVX512,FUTURE
+VMOVSS xmmreg|mask|z,mem32 [rm:t1s: evex.128.f3.0f.w0 10 /r ] AVX512,FUTURE
+VMOVSS mem32|mask,xmmreg [mr:t1s: evex.128.f3.0f.w0 11 /r ] AVX512,FUTURE
+VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.128.f3.0f.w0 10 /r ] AVX512,FUTURE
+VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.128.f3.0f.w0 11 /r ] AVX512,FUTURE
+VMOVUPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 10 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 10 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 10 /r ] AVX512,FUTURE
+VMOVUPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE
+VMOVUPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE
+VMOVUPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 10 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 10 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 10 /r ] AVX512,FUTURE
+VMOVUPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 11 /r ] AVX512,FUTURE
+VMOVUPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VMOVUPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 11 /r ] AVX512,FUTURE
+VMULPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VMULPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VMULPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 59 /r ] AVX512,FUTURE
+VMULPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 59 /r ] AVX512VL,AVX512,FUTURE
+VMULPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 59 /r ] AVX512VL,AVX512,FUTURE
+VMULPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 59 /r ] AVX512,FUTURE
+VMULSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 59 /r ] AVX512,FUTURE
+VMULSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.f3.0f.w0 59 /r ] AVX512,FUTURE
+VORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE
+VORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE
+VORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 56 /r ] AVX512DQ,FUTURE
+VORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE
+VORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE
+VORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 56 /r ] AVX512DQ,FUTURE
+VPABSB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE
+VPABSB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE
+VPABSB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1c /r ] AVX512BW,FUTURE
+VPABSD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 1e /r ] AVX512VL,AVX512,FUTURE
+VPABSD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 1e /r ] AVX512VL,AVX512,FUTURE
+VPABSD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 1e /r ] AVX512,FUTURE
+VPABSQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 1f /r ] AVX512VL,AVX512,FUTURE
+VPABSQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 1f /r ] AVX512VL,AVX512,FUTURE
+VPABSQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 1f /r ] AVX512,FUTURE
+VPABSW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE
+VPABSW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE
+VPABSW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1d /r ] AVX512BW,FUTURE
+VPACKSSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE
+VPACKSSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE
+VPACKSSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6b /r ] AVX512BW,FUTURE
+VPACKSSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE
+VPACKSSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE
+VPACKSSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 63 /r ] AVX512BW,FUTURE
+VPACKUSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE
+VPACKUSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE
+VPACKUSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 2b /r ] AVX512BW,FUTURE
+VPACKUSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE
+VPACKUSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE
+VPACKUSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 67 /r ] AVX512BW,FUTURE
+VPADDB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE
+VPADDB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE
+VPADDB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fc /r ] AVX512BW,FUTURE
+VPADDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fe /r ] AVX512VL,AVX512,FUTURE
+VPADDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fe /r ] AVX512VL,AVX512,FUTURE
+VPADDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fe /r ] AVX512,FUTURE
+VPADDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 d4 /r ] AVX512VL,AVX512,FUTURE
+VPADDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 d4 /r ] AVX512VL,AVX512,FUTURE
+VPADDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 d4 /r ] AVX512,FUTURE
+VPADDSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE
+VPADDSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE
+VPADDSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ec /r ] AVX512BW,FUTURE
+VPADDSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE
+VPADDSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE
+VPADDSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ed /r ] AVX512BW,FUTURE
+VPADDUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE
+VPADDUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE
+VPADDUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dc /r ] AVX512BW,FUTURE
+VPADDUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE
+VPADDUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE
+VPADDUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dd /r ] AVX512BW,FUTURE
+VPADDW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE
+VPADDW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE
+VPADDW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fd /r ] AVX512BW,FUTURE
+VPALIGNR xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPALIGNR ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPALIGNR zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.wig 0f /r ib ] AVX512BW,FUTURE
+VPANDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 db /r ] AVX512VL,AVX512,FUTURE
+VPANDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 db /r ] AVX512VL,AVX512,FUTURE
+VPANDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 db /r ] AVX512,FUTURE
+VPANDND xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 df /r ] AVX512VL,AVX512,FUTURE
+VPANDND ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 df /r ] AVX512VL,AVX512,FUTURE
+VPANDND zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 df /r ] AVX512,FUTURE
+VPANDNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 df /r ] AVX512VL,AVX512,FUTURE
+VPANDNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 df /r ] AVX512VL,AVX512,FUTURE
+VPANDNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 df /r ] AVX512,FUTURE
+VPANDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 db /r ] AVX512VL,AVX512,FUTURE
+VPANDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 db /r ] AVX512VL,AVX512,FUTURE
+VPANDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 db /r ] AVX512,FUTURE
+VPAVGB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE
+VPAVGB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE
+VPAVGB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e0 /r ] AVX512BW,FUTURE
+VPAVGW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE
+VPAVGW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE
+VPAVGW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e3 /r ] AVX512BW,FUTURE
+VPBLENDMB xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE
+VPBLENDMB ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE
+VPBLENDMB zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 66 /r ] AVX512BW,FUTURE
+VPBLENDMD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 64 /r ] AVX512VL,AVX512,FUTURE
+VPBLENDMD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 64 /r ] AVX512VL,AVX512,FUTURE
+VPBLENDMD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 64 /r ] AVX512,FUTURE
+VPBLENDMQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 64 /r ] AVX512VL,AVX512,FUTURE
+VPBLENDMQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 64 /r ] AVX512VL,AVX512,FUTURE
+VPBLENDMQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 64 /r ] AVX512,FUTURE
+VPBLENDMW xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE
+VPBLENDMW ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE
+VPBLENDMW zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 66 /r ] AVX512BW,FUTURE
+VPBROADCASTB xmmreg|mask|z,xmmrm8 [rm:t1s8: evex.128.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB ymmreg|mask|z,xmmrm8 [rm:t1s8: evex.256.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB zmmreg|mask|z,xmmrm8 [rm:t1s8: evex.512.66.0f38.w0 78 /r ] AVX512BW,FUTURE
+VPBROADCASTB xmmreg|mask|z,reg8 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB ymmreg|mask|z,reg8 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTB zmmreg|mask|z,reg8 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE
+VPBROADCASTB zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE
+VPBROADCASTB zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE
+VPBROADCASTB zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE
+VPBROADCASTD xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE
+VPBROADCASTD xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 58 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE
+VPBROADCASTD xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7c /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7c /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTD zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7c /r ] AVX512,FUTURE
+VPBROADCASTMB2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 2a /r ] AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMB2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 2a /r ] AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMB2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 2a /r ] AVX512CD,FUTURE
+VPBROADCASTMW2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 3a /r ] AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMW2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 3a /r ] AVX512VL,AVX512CD,FUTURE
+VPBROADCASTMW2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 3a /r ] AVX512CD,FUTURE
+VPBROADCASTQ xmmreg|mask|z,mem64 [rm:t1s: evex.128.66.0f38.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE
+VPBROADCASTQ xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 59 /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE
+VPBROADCASTQ xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w1 7c /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w1 7c /r ] AVX512VL,AVX512,FUTURE
+VPBROADCASTQ zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w1 7c /r ] AVX512,FUTURE
+VPBROADCASTW xmmreg|mask|z,xmmrm16 [rm:t1s16: evex.128.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW ymmreg|mask|z,xmmrm16 [rm:t1s16: evex.256.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW zmmreg|mask|z,xmmrm16 [rm:t1s16: evex.512.66.0f38.w0 79 /r ] AVX512BW,FUTURE
+VPBROADCASTW xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE
+VPBROADCASTW zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE
+VPBROADCASTW zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE
+VPBROADCASTW zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE
+VPCMPB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r ib ] AVX512BW,FUTURE
+VPCMPD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r ib ] AVX512,FUTURE
+VPCMPEQB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPEQB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPEQB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 74 /r ] AVX512BW,FUTURE
+VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 76 /r ] AVX512VL,AVX512,FUTURE
+VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 76 /r ] AVX512VL,AVX512,FUTURE
+VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 76 /r ] AVX512,FUTURE
+VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 29 /r ] AVX512VL,AVX512,FUTURE
+VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 29 /r ] AVX512,FUTURE
+VPCMPEQW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPEQW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPEQW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 75 /r ] AVX512BW,FUTURE
+VPCMPGTB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPGTB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPGTB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 64 /r ] AVX512BW,FUTURE
+VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 66 /r ] AVX512VL,AVX512,FUTURE
+VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 66 /r ] AVX512VL,AVX512,FUTURE
+VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 66 /r ] AVX512,FUTURE
+VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 37 /r ] AVX512VL,AVX512,FUTURE
+VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 37 /r ] AVX512VL,AVX512,FUTURE
+VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 37 /r ] AVX512,FUTURE
+VPCMPGTW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPGTW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE
+VPCMPGTW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 65 /r ] AVX512BW,FUTURE
+VPCMPQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r ib ] AVX512,FUTURE
+VPCMPUB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPUB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPUB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r ib ] AVX512BW,FUTURE
+VPCMPUD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPUD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPUD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r ib ] AVX512,FUTURE
+VPCMPUQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPUQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r ib ] AVX512VL,AVX512,FUTURE
+VPCMPUQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r ib ] AVX512,FUTURE
+VPCMPUW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPUW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPUW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r ib ] AVX512BW,FUTURE
+VPCMPW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE
+VPCMPW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r ib ] AVX512BW,FUTURE
+VPCOMPRESSD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE
+VPCOMPRESSD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE
+VPCOMPRESSQ mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE
+VPCOMPRESSQ xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8b /r ] AVX512VL,AVX512,FUTURE
+VPCOMPRESSQ zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE
+VPCONFLICTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 c4 /r ] AVX512VL,AVX512CD,FUTURE
+VPCONFLICTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 c4 /r ] AVX512VL,AVX512CD,FUTURE
+VPCONFLICTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 c4 /r ] AVX512CD,FUTURE
+VPCONFLICTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 c4 /r ] AVX512VL,AVX512CD,FUTURE
+VPCONFLICTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 c4 /r ] AVX512VL,AVX512CD,FUTURE
+VPCONFLICTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 c4 /r ] AVX512CD,FUTURE
+VPERMB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8d /r ] AVX512VBMI,FUTURE
+VPERMD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 36 /r ] AVX512VL,AVX512,FUTURE
+VPERMD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 36 /r ] AVX512,FUTURE
+VPERMI2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMI2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMI2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 75 /r ] AVX512VBMI,FUTURE
+VPERMI2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 76 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 76 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 76 /r ] AVX512,FUTURE
+VPERMI2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 77 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 77 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 77 /r ] AVX512,FUTURE
+VPERMI2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 77 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 77 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 77 /r ] AVX512,FUTURE
+VPERMI2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 76 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 76 /r ] AVX512VL,AVX512,FUTURE
+VPERMI2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 76 /r ] AVX512,FUTURE
+VPERMI2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE
+VPERMI2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE
+VPERMI2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 75 /r ] AVX512BW,FUTURE
+VPERMILPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 05 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMILPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 05 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMILPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 05 /r ib ] AVX512,FUTURE
+VPERMILPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 0d /r ] AVX512VL,AVX512,FUTURE
+VPERMILPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 0d /r ] AVX512VL,AVX512,FUTURE
+VPERMILPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 0d /r ] AVX512,FUTURE
+VPERMILPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 04 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMILPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 04 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMILPS zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 04 /r ib ] AVX512,FUTURE
+VPERMILPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 0c /r ] AVX512VL,AVX512,FUTURE
+VPERMILPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 0c /r ] AVX512VL,AVX512,FUTURE
+VPERMILPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 0c /r ] AVX512,FUTURE
+VPERMPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 01 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 01 /r ib ] AVX512,FUTURE
+VPERMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 16 /r ] AVX512VL,AVX512,FUTURE
+VPERMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 16 /r ] AVX512,FUTURE
+VPERMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 16 /r ] AVX512VL,AVX512,FUTURE
+VPERMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 16 /r ] AVX512,FUTURE
+VPERMQ ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 00 /r ib ] AVX512VL,AVX512,FUTURE
+VPERMQ zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 00 /r ib ] AVX512,FUTURE
+VPERMQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 36 /r ] AVX512VL,AVX512,FUTURE
+VPERMQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 36 /r ] AVX512,FUTURE
+VPERMT2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMT2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE
+VPERMT2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 7d /r ] AVX512VBMI,FUTURE
+VPERMT2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7e /r ] AVX512VL,AVX512,FUTURE
+VPERMT2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7e /r ] AVX512VL,AVX512,FUTURE
+VPERMT2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7e /r ] AVX512,FUTURE
+VPERMT2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VPERMT2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7f /r ] AVX512VL,AVX512,FUTURE
+VPERMT2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7f /r ] AVX512,FUTURE
+VPERMT2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VPERMT2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7f /r ] AVX512VL,AVX512,FUTURE
+VPERMT2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7f /r ] AVX512,FUTURE
+VPERMT2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7e /r ] AVX512VL,AVX512,FUTURE
+VPERMT2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7e /r ] AVX512VL,AVX512,FUTURE
+VPERMT2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7e /r ] AVX512,FUTURE
+VPERMT2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE
+VPERMT2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE
+VPERMT2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 7d /r ] AVX512BW,FUTURE
+VPERMW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE
+VPERMW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE
+VPERMW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 8d /r ] AVX512BW,FUTURE
+VPEXPANDD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE
+VPEXPANDD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE
+VPEXPANDQ xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDQ ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDQ zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE
+VPEXPANDQ xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDQ ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512VL,AVX512,FUTURE
+VPEXPANDQ zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE
+VPEXTRB reg8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE
+VPEXTRB reg16,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE
+VPEXTRB reg32,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE
+VPEXTRB reg64,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE
+VPEXTRB mem8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE
+VPEXTRD rm32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w0 16 /r ib ] AVX512DQ,FUTURE
+VPEXTRQ rm64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w1 16 /r ib ] AVX512DQ,FUTURE
+VPEXTRW reg16,xmmreg,imm8 [mri:t1s16: evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE
+VPEXTRW reg32,xmmreg,imm8 [mri:t1s16: evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE
+VPEXTRW reg64,xmmreg,imm8 [mri:t1s16: evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE
+VPEXTRW mem16,xmmreg,imm8 [mri:t1s16: evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE
+VPEXTRW reg16,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE
+VPEXTRW reg32,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE
+VPEXTRW reg64,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE
+VPGATHERDD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 90 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERDD ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 90 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERDD zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 90 /r ] AVX512,FUTURE
+VPGATHERDQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 90 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERDQ ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 90 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERDQ zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 90 /r ] AVX512,FUTURE
+VPGATHERQD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 91 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERQD xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 91 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERQD ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 91 /r ] AVX512,FUTURE
+VPGATHERQQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 91 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERQQ ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 91 /r ] AVX512VL,AVX512,FUTURE
+VPGATHERQQ zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 91 /r ] AVX512,FUTURE
+VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s8: evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE
+VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi:t1s8: evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE
+VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 22 /r ib ] AVX512DQ,FUTURE
+VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 22 /r ib ] AVX512DQ,FUTURE
+VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s16: evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE
+VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi:t1s16: evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE
+VPLZCNTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 44 /r ] AVX512VL,AVX512CD,FUTURE
+VPLZCNTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 44 /r ] AVX512VL,AVX512CD,FUTURE
+VPLZCNTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 44 /r ] AVX512CD,FUTURE
+VPLZCNTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 44 /r ] AVX512VL,AVX512CD,FUTURE
+VPLZCNTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 44 /r ] AVX512VL,AVX512CD,FUTURE
+VPLZCNTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 44 /r ] AVX512CD,FUTURE
+VPMADD52HUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE
+VPMADD52HUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE
+VPMADD52HUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b5 /r ] AVX512IFMA,FUTURE
+VPMADD52LUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE
+VPMADD52LUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE
+VPMADD52LUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b4 /r ] AVX512IFMA,FUTURE
+VPMADDUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE
+VPMADDUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE
+VPMADDUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 04 /r ] AVX512BW,FUTURE
+VPMADDWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMADDWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMADDWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f5 /r ] AVX512BW,FUTURE
+VPMAXSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3c /r ] AVX512BW,FUTURE
+VPMAXSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3d /r ] AVX512VL,AVX512,FUTURE
+VPMAXSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3d /r ] AVX512VL,AVX512,FUTURE
+VPMAXSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3d /r ] AVX512,FUTURE
+VPMAXSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3d /r ] AVX512VL,AVX512,FUTURE
+VPMAXSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3d /r ] AVX512VL,AVX512,FUTURE
+VPMAXSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3d /r ] AVX512,FUTURE
+VPMAXSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ee /r ] AVX512BW,FUTURE
+VPMAXUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig de /r ] AVX512BW,FUTURE
+VPMAXUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3f /r ] AVX512VL,AVX512,FUTURE
+VPMAXUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3f /r ] AVX512VL,AVX512,FUTURE
+VPMAXUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3f /r ] AVX512,FUTURE
+VPMAXUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3f /r ] AVX512VL,AVX512,FUTURE
+VPMAXUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3f /r ] AVX512VL,AVX512,FUTURE
+VPMAXUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3f /r ] AVX512,FUTURE
+VPMAXUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE
+VPMAXUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3e /r ] AVX512BW,FUTURE
+VPMINSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE
+VPMINSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE
+VPMINSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 38 /r ] AVX512BW,FUTURE
+VPMINSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 39 /r ] AVX512VL,AVX512,FUTURE
+VPMINSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 39 /r ] AVX512VL,AVX512,FUTURE
+VPMINSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 39 /r ] AVX512,FUTURE
+VPMINSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 39 /r ] AVX512VL,AVX512,FUTURE
+VPMINSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 39 /r ] AVX512VL,AVX512,FUTURE
+VPMINSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 39 /r ] AVX512,FUTURE
+VPMINSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE
+VPMINSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE
+VPMINSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ea /r ] AVX512BW,FUTURE
+VPMINUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE
+VPMINUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE
+VPMINUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig da /r ] AVX512BW,FUTURE
+VPMINUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3b /r ] AVX512VL,AVX512,FUTURE
+VPMINUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3b /r ] AVX512VL,AVX512,FUTURE
+VPMINUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3b /r ] AVX512,FUTURE
+VPMINUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3b /r ] AVX512VL,AVX512,FUTURE
+VPMINUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3b /r ] AVX512VL,AVX512,FUTURE
+VPMINUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3b /r ] AVX512,FUTURE
+VPMINUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE
+VPMINUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE
+VPMINUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3a /r ] AVX512BW,FUTURE
+VPMOVB2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVB2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVB2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 29 /r ] AVX512BW,FUTURE
+VPMOVD2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVD2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVD2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 39 /r ] AVX512DQ,FUTURE
+VPMOVDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE
+VPMOVDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE
+VPMOVDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE
+VPMOVDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE
+VPMOVM2B xmmreg,kreg [rm: evex.128.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVM2B ymmreg,kreg [rm: evex.256.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVM2B zmmreg,kreg [rm: evex.512.f3.0f38.w0 28 /r ] AVX512BW,FUTURE
+VPMOVM2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVM2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVM2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 38 /r ] AVX512DQ,FUTURE
+VPMOVM2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVM2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVM2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 38 /r ] AVX512DQ,FUTURE
+VPMOVM2W xmmreg,kreg [rm: evex.128.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVM2W ymmreg,kreg [rm: evex.256.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVM2W zmmreg,kreg [rm: evex.512.f3.0f38.w1 28 /r ] AVX512BW,FUTURE
+VPMOVQ2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVQ2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMOVQ2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 39 /r ] AVX512DQ,FUTURE
+VPMOVQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE
+VPMOVQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE
+VPMOVQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE
+VPMOVQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE
+VPMOVQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE
+VPMOVQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE
+VPMOVSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE
+VPMOVSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE
+VPMOVSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE
+VPMOVSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE
+VPMOVSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE
+VPMOVSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE
+VPMOVSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE
+VPMOVSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE
+VPMOVSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE
+VPMOVSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE
+VPMOVSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE
+VPMOVSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE
+VPMOVSXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 21 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 21 /r ] AVX512,FUTURE
+VPMOVSXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 22 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 22 /r ] AVX512,FUTURE
+VPMOVSXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVSXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 20 /r ] AVX512BW,FUTURE
+VPMOVSXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 25 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 25 /r ] AVX512,FUTURE
+VPMOVSXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 23 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 23 /r ] AVX512,FUTURE
+VPMOVSXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 24 /r ] AVX512VL,AVX512,FUTURE
+VPMOVSXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 24 /r ] AVX512,FUTURE
+VPMOVUSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE
+VPMOVUSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 11 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE
+VPMOVUSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE
+VPMOVUSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 13 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE
+VPMOVUSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE
+VPMOVUSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 12 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE
+VPMOVUSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE
+VPMOVUSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE
+VPMOVUSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE
+VPMOVUSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPMOVUSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE
+VPMOVUSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE
+VPMOVUSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVUSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE
+VPMOVW2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVW2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVW2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 29 /r ] AVX512BW,FUTURE
+VPMOVWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE
+VPMOVWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE
+VPMOVZXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 31 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 31 /r ] AVX512,FUTURE
+VPMOVZXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 32 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 32 /r ] AVX512,FUTURE
+VPMOVZXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVZXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE
+VPMOVZXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 30 /r ] AVX512BW,FUTURE
+VPMOVZXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 35 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 35 /r ] AVX512,FUTURE
+VPMOVZXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 33 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 33 /r ] AVX512,FUTURE
+VPMOVZXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 34 /r ] AVX512VL,AVX512,FUTURE
+VPMOVZXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 34 /r ] AVX512,FUTURE
+VPMULDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 28 /r ] AVX512VL,AVX512,FUTURE
+VPMULDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 28 /r ] AVX512VL,AVX512,FUTURE
+VPMULDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 28 /r ] AVX512,FUTURE
+VPMULHRSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHRSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHRSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 0b /r ] AVX512BW,FUTURE
+VPMULHUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e4 /r ] AVX512BW,FUTURE
+VPMULHW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULHW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e5 /r ] AVX512BW,FUTURE
+VPMULLD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 40 /r ] AVX512VL,AVX512,FUTURE
+VPMULLD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 40 /r ] AVX512VL,AVX512,FUTURE
+VPMULLD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 40 /r ] AVX512,FUTURE
+VPMULLQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMULLQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE
+VPMULLQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 40 /r ] AVX512DQ,FUTURE
+VPMULLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULLW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE
+VPMULLW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d5 /r ] AVX512BW,FUTURE
+VPMULTISHIFTQB xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE
+VPMULTISHIFTQB ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE
+VPMULTISHIFTQB zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 83 /r ] AVX512VBMI,FUTURE
+VPMULUDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 f4 /r ] AVX512VL,AVX512,FUTURE
+VPMULUDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 f4 /r ] AVX512VL,AVX512,FUTURE
+VPMULUDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 f4 /r ] AVX512,FUTURE
+VPORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 eb /r ] AVX512VL,AVX512,FUTURE
+VPORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 eb /r ] AVX512VL,AVX512,FUTURE
+VPORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 eb /r ] AVX512,FUTURE
+VPORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 eb /r ] AVX512VL,AVX512,FUTURE
+VPORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 eb /r ] AVX512VL,AVX512,FUTURE
+VPORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 eb /r ] AVX512,FUTURE
+VPROLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /1 ib ] AVX512VL,AVX512,FUTURE
+VPROLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /1 ib ] AVX512VL,AVX512,FUTURE
+VPROLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /1 ib ] AVX512,FUTURE
+VPROLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /1 ib ] AVX512VL,AVX512,FUTURE
+VPROLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /1 ib ] AVX512VL,AVX512,FUTURE
+VPROLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /1 ib ] AVX512,FUTURE
+VPROLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPROLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VPROLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 15 /r ] AVX512,FUTURE
+VPROLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 15 /r ] AVX512VL,AVX512,FUTURE
+VPROLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 15 /r ] AVX512VL,AVX512,FUTURE
+VPROLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 15 /r ] AVX512,FUTURE
+VPRORD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /0 ib ] AVX512VL,AVX512,FUTURE
+VPRORD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /0 ib ] AVX512VL,AVX512,FUTURE
+VPRORD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /0 ib ] AVX512,FUTURE
+VPRORQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /0 ib ] AVX512VL,AVX512,FUTURE
+VPRORQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /0 ib ] AVX512VL,AVX512,FUTURE
+VPRORQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /0 ib ] AVX512,FUTURE
+VPRORVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPRORVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VPRORVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 14 /r ] AVX512,FUTURE
+VPRORVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 14 /r ] AVX512VL,AVX512,FUTURE
+VPRORVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 14 /r ] AVX512VL,AVX512,FUTURE
+VPRORVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 14 /r ] AVX512,FUTURE
+VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE
+VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE
+VPSADBW zmmreg,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f6 /r ] AVX512BW,FUTURE
+VPSCATTERDD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a0 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERDD ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a0 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERDD zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a0 /r ] AVX512,FUTURE
+VPSCATTERDQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a0 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERDQ xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a0 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERDQ ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a0 /r ] AVX512,FUTURE
+VPSCATTERQD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a1 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERQD ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a1 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERQD zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a1 /r ] AVX512,FUTURE
+VPSCATTERQQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a1 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERQQ ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a1 /r ] AVX512VL,AVX512,FUTURE
+VPSCATTERQQ zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a1 /r ] AVX512,FUTURE
+VPSHUFB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE
+VPSHUFB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE
+VPSHUFB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 00 /r ] AVX512BW,FUTURE
+VPSHUFD xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f.w0 70 /r ib ] AVX512VL,AVX512,FUTURE
+VPSHUFD ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f.w0 70 /r ib ] AVX512VL,AVX512,FUTURE
+VPSHUFD zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f.w0 70 /r ib ] AVX512,FUTURE
+VPSHUFHW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE
+VPSHUFHW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE
+VPSHUFHW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f3.0f.wig 70 /r ib ] AVX512BW,FUTURE
+VPSHUFLW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE
+VPSHUFLW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE
+VPSHUFLW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f2.0f.wig 70 /r ib ] AVX512BW,FUTURE
+VPSLLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 f2 /r ] AVX512VL,AVX512,FUTURE
+VPSLLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 f2 /r ] AVX512VL,AVX512,FUTURE
+VPSLLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 f2 /r ] AVX512,FUTURE
+VPSLLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /6 ib ] AVX512VL,AVX512,FUTURE
+VPSLLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /6 ib ] AVX512VL,AVX512,FUTURE
+VPSLLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /6 ib ] AVX512,FUTURE
+VPSLLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE
+VPSLLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE
+VPSLLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /7 ib ] AVX512BW,FUTURE
+VPSLLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 f3 /r ] AVX512VL,AVX512,FUTURE
+VPSLLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 f3 /r ] AVX512VL,AVX512,FUTURE
+VPSLLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 f3 /r ] AVX512,FUTURE
+VPSLLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /6 ib ] AVX512VL,AVX512,FUTURE
+VPSLLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /6 ib ] AVX512VL,AVX512,FUTURE
+VPSLLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /6 ib ] AVX512,FUTURE
+VPSLLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 47 /r ] AVX512VL,AVX512,FUTURE
+VPSLLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 47 /r ] AVX512VL,AVX512,FUTURE
+VPSLLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 47 /r ] AVX512,FUTURE
+VPSLLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 47 /r ] AVX512VL,AVX512,FUTURE
+VPSLLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 47 /r ] AVX512VL,AVX512,FUTURE
+VPSLLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 47 /r ] AVX512,FUTURE
+VPSLLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE
+VPSLLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE
+VPSLLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 12 /r ] AVX512BW,FUTURE
+VPSLLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSLLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSLLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig f1 /r ] AVX512BW,FUTURE
+VPSLLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE
+VPSLLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE
+VPSLLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /6 ib ] AVX512BW,FUTURE
+VPSRAD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 e2 /r ] AVX512VL,AVX512,FUTURE
+VPSRAD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 e2 /r ] AVX512VL,AVX512,FUTURE
+VPSRAD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 e2 /r ] AVX512,FUTURE
+VPSRAD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /4 ib ] AVX512VL,AVX512,FUTURE
+VPSRAD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /4 ib ] AVX512VL,AVX512,FUTURE
+VPSRAD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /4 ib ] AVX512,FUTURE
+VPSRAQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 e2 /r ] AVX512VL,AVX512,FUTURE
+VPSRAQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 e2 /r ] AVX512VL,AVX512,FUTURE
+VPSRAQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 e2 /r ] AVX512,FUTURE
+VPSRAQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /4 ib ] AVX512VL,AVX512,FUTURE
+VPSRAQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /4 ib ] AVX512VL,AVX512,FUTURE
+VPSRAQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /4 ib ] AVX512,FUTURE
+VPSRAVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 46 /r ] AVX512VL,AVX512,FUTURE
+VPSRAVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 46 /r ] AVX512VL,AVX512,FUTURE
+VPSRAVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 46 /r ] AVX512,FUTURE
+VPSRAVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 46 /r ] AVX512VL,AVX512,FUTURE
+VPSRAVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 46 /r ] AVX512VL,AVX512,FUTURE
+VPSRAVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 46 /r ] AVX512,FUTURE
+VPSRAVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRAVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRAVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 11 /r ] AVX512BW,FUTURE
+VPSRAW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRAW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRAW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig e1 /r ] AVX512BW,FUTURE
+VPSRAW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRAW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRAW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /4 ib ] AVX512BW,FUTURE
+VPSRLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 d2 /r ] AVX512VL,AVX512,FUTURE
+VPSRLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 d2 /r ] AVX512VL,AVX512,FUTURE
+VPSRLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 d2 /r ] AVX512,FUTURE
+VPSRLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /2 ib ] AVX512VL,AVX512,FUTURE
+VPSRLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /2 ib ] AVX512VL,AVX512,FUTURE
+VPSRLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /2 ib ] AVX512,FUTURE
+VPSRLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /3 ib ] AVX512BW,FUTURE
+VPSRLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 d3 /r ] AVX512VL,AVX512,FUTURE
+VPSRLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 d3 /r ] AVX512VL,AVX512,FUTURE
+VPSRLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 d3 /r ] AVX512,FUTURE
+VPSRLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /2 ib ] AVX512VL,AVX512,FUTURE
+VPSRLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /2 ib ] AVX512VL,AVX512,FUTURE
+VPSRLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /2 ib ] AVX512,FUTURE
+VPSRLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 45 /r ] AVX512VL,AVX512,FUTURE
+VPSRLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 45 /r ] AVX512VL,AVX512,FUTURE
+VPSRLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 45 /r ] AVX512,FUTURE
+VPSRLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 45 /r ] AVX512VL,AVX512,FUTURE
+VPSRLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 45 /r ] AVX512VL,AVX512,FUTURE
+VPSRLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 45 /r ] AVX512,FUTURE
+VPSRLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 10 /r ] AVX512BW,FUTURE
+VPSRLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE
+VPSRLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig d1 /r ] AVX512BW,FUTURE
+VPSRLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE
+VPSRLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /2 ib ] AVX512BW,FUTURE
+VPSUBB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f8 /r ] AVX512BW,FUTURE
+VPSUBD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fa /r ] AVX512VL,AVX512,FUTURE
+VPSUBD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fa /r ] AVX512VL,AVX512,FUTURE
+VPSUBD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fa /r ] AVX512,FUTURE
+VPSUBQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 fb /r ] AVX512VL,AVX512,FUTURE
+VPSUBQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 fb /r ] AVX512VL,AVX512,FUTURE
+VPSUBQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 fb /r ] AVX512,FUTURE
+VPSUBSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e8 /r ] AVX512BW,FUTURE
+VPSUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e9 /r ] AVX512BW,FUTURE
+VPSUBUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d8 /r ] AVX512BW,FUTURE
+VPSUBUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d9 /r ] AVX512BW,FUTURE
+VPSUBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE
+VPSUBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f9 /r ] AVX512BW,FUTURE
+VPTERNLOGD xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 25 /r ib ] AVX512VL,AVX512,FUTURE
+VPTERNLOGD ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 25 /r ib ] AVX512VL,AVX512,FUTURE
+VPTERNLOGD zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 25 /r ib ] AVX512,FUTURE
+VPTERNLOGQ xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 25 /r ib ] AVX512VL,AVX512,FUTURE
+VPTERNLOGQ ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 25 /r ib ] AVX512VL,AVX512,FUTURE
+VPTERNLOGQ zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 25 /r ib ] AVX512,FUTURE
+VPTESTMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 26 /r ] AVX512BW,FUTURE
+VPTESTMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 27 /r ] AVX512,FUTURE
+VPTESTMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 27 /r ] AVX512,FUTURE
+VPTESTMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 26 /r ] AVX512BW,FUTURE
+VPTESTNMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTNMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTNMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w0 26 /r ] AVX512BW,FUTURE
+VPTESTNMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.0f38.w0 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTNMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.0f38.w0 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTNMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.f3.0f38.w0 27 /r ] AVX512,FUTURE
+VPTESTNMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.f3.0f38.w1 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTNMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.f3.0f38.w1 27 /r ] AVX512VL,AVX512,FUTURE
+VPTESTNMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.f3.0f38.w1 27 /r ] AVX512,FUTURE
+VPTESTNMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTNMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE
+VPTESTNMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w1 26 /r ] AVX512BW,FUTURE
+VPUNPCKHBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKHBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKHBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 68 /r ] AVX512BW,FUTURE
+VPUNPCKHDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6a /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKHDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6a /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKHDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6a /r ] AVX512,FUTURE
+VPUNPCKHQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6d /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKHQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6d /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKHQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6d /r ] AVX512,FUTURE
+VPUNPCKHWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKHWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKHWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 69 /r ] AVX512BW,FUTURE
+VPUNPCKLBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKLBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKLBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 60 /r ] AVX512BW,FUTURE
+VPUNPCKLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 62 /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 62 /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 62 /r ] AVX512,FUTURE
+VPUNPCKLQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6c /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKLQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6c /r ] AVX512VL,AVX512,FUTURE
+VPUNPCKLQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6c /r ] AVX512,FUTURE
+VPUNPCKLWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKLWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE
+VPUNPCKLWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 61 /r ] AVX512BW,FUTURE
+VPXORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 ef /r ] AVX512VL,AVX512,FUTURE
+VPXORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 ef /r ] AVX512VL,AVX512,FUTURE
+VPXORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 ef /r ] AVX512,FUTURE
+VPXORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 ef /r ] AVX512VL,AVX512,FUTURE
+VPXORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 ef /r ] AVX512VL,AVX512,FUTURE
+VPXORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 ef /r ] AVX512,FUTURE
+VRANGEPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VRANGEPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VRANGEPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 50 /r ib ] AVX512DQ,FUTURE
+VRANGEPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VRANGEPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VRANGEPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 50 /r ib ] AVX512DQ,FUTURE
+VRANGESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 51 /r ib ] AVX512DQ,FUTURE
+VRANGESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 51 /r ib ] AVX512DQ,FUTURE
+VRCP14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4c /r ] AVX512VL,AVX512,FUTURE
+VRCP14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4c /r ] AVX512VL,AVX512,FUTURE
+VRCP14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4c /r ] AVX512,FUTURE
+VRCP14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4c /r ] AVX512VL,AVX512,FUTURE
+VRCP14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4c /r ] AVX512VL,AVX512,FUTURE
+VRCP14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4c /r ] AVX512,FUTURE
+VRCP14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.128.66.0f38.w1 4d /r ] AVX512,FUTURE
+VRCP14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.128.66.0f38.w0 4d /r ] AVX512,FUTURE
+VRCP28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 ca /r ] AVX512ER,FUTURE
+VRCP28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 ca /r ] AVX512ER,FUTURE
+VRCP28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.128.66.0f38.w1 cb /r ] AVX512ER,FUTURE
+VRCP28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.128.66.0f38.w0 cb /r ] AVX512ER,FUTURE
+VREDUCEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VREDUCEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VREDUCEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 56 /r ib ] AVX512DQ,FUTURE
+VREDUCEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VREDUCEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE
+VREDUCEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 56 /r ib ] AVX512DQ,FUTURE
+VREDUCESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 57 /r ib ] AVX512DQ,FUTURE
+VREDUCESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 57 /r ib ] AVX512DQ,FUTURE
+VRNDSCALEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 09 /r ib ] AVX512VL,AVX512,FUTURE
+VRNDSCALEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 09 /r ib ] AVX512VL,AVX512,FUTURE
+VRNDSCALEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 09 /r ib ] AVX512,FUTURE
+VRNDSCALEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 08 /r ib ] AVX512VL,AVX512,FUTURE
+VRNDSCALEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 08 /r ib ] AVX512VL,AVX512,FUTURE
+VRNDSCALEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 08 /r ib ] AVX512,FUTURE
+VRNDSCALESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 0b /r ib ] AVX512,FUTURE
+VRNDSCALESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 0a /r ib ] AVX512,FUTURE
+VRSQRT14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4e /r ] AVX512VL,AVX512,FUTURE
+VRSQRT14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4e /r ] AVX512VL,AVX512,FUTURE
+VRSQRT14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4e /r ] AVX512,FUTURE
+VRSQRT14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4e /r ] AVX512VL,AVX512,FUTURE
+VRSQRT14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4e /r ] AVX512VL,AVX512,FUTURE
+VRSQRT14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4e /r ] AVX512,FUTURE
+VRSQRT14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.128.66.0f38.w1 4f /r ] AVX512,FUTURE
+VRSQRT14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.128.66.0f38.w0 4f /r ] AVX512,FUTURE
+VRSQRT28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 cc /r ] AVX512ER,FUTURE
+VRSQRT28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 cc /r ] AVX512ER,FUTURE
+VRSQRT28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.128.66.0f38.w1 cd /r ] AVX512ER,FUTURE
+VRSQRT28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.128.66.0f38.w0 cd /r ] AVX512ER,FUTURE
+VSCALEFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 2c /r ] AVX512VL,AVX512,FUTURE
+VSCALEFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 2c /r ] AVX512VL,AVX512,FUTURE
+VSCALEFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 2c /r ] AVX512,FUTURE
+VSCALEFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2c /r ] AVX512VL,AVX512,FUTURE
+VSCALEFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2c /r ] AVX512VL,AVX512,FUTURE
+VSCALEFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 2c /r ] AVX512,FUTURE
+VSCALEFSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.66.0f38.w1 2d /r ] AVX512,FUTURE
+VSCALEFSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.66.0f38.w0 2d /r ] AVX512,FUTURE
+VSCATTERDPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a2 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERDPD xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a2 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERDPD ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a2 /r ] AVX512,FUTURE
+VSCATTERDPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a2 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERDPS ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a2 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERDPS zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a2 /r ] AVX512,FUTURE
+VSCATTERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /5 ] AVX512PF,FUTURE
+VSCATTERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /5 ] AVX512PF,FUTURE
+VSCATTERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /5 ] AVX512PF,FUTURE
+VSCATTERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /5 ] AVX512PF,FUTURE
+VSCATTERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /6 ] AVX512PF,FUTURE
+VSCATTERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /6 ] AVX512PF,FUTURE
+VSCATTERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /6 ] AVX512PF,FUTURE
+VSCATTERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /6 ] AVX512PF,FUTURE
+VSCATTERQPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a3 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERQPD ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a3 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERQPD zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a3 /r ] AVX512,FUTURE
+VSCATTERQPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a3 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERQPS ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a3 /r ] AVX512VL,AVX512,FUTURE
+VSCATTERQPS zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a3 /r ] AVX512,FUTURE
+VSHUFF32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 23 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFF32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 23 /r ib ] AVX512,FUTURE
+VSHUFF64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 23 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFF64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 23 /r ib ] AVX512,FUTURE
+VSHUFI32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 43 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFI32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 43 /r ib ] AVX512,FUTURE
+VSHUFI64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 43 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFI64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 43 /r ib ] AVX512,FUTURE
+VSHUFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c6 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c6 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c6 /r ib ] AVX512,FUTURE
+VSHUFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c6 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c6 /r ib ] AVX512VL,AVX512,FUTURE
+VSHUFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.0f.w0 c6 /r ib ] AVX512,FUTURE
+VSQRTPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 51 /r ] AVX512VL,AVX512,FUTURE
+VSQRTPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 51 /r ] AVX512VL,AVX512,FUTURE
+VSQRTPD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 51 /r ] AVX512,FUTURE
+VSQRTPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 51 /r ] AVX512VL,AVX512,FUTURE
+VSQRTPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 51 /r ] AVX512VL,AVX512,FUTURE
+VSQRTPS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 51 /r ] AVX512,FUTURE
+VSQRTSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 51 /r ] AVX512,FUTURE
+VSQRTSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.f3.0f.w0 51 /r ] AVX512,FUTURE
+VSUBPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5c /r ] AVX512VL,AVX512,FUTURE
+VSUBPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5c /r ] AVX512VL,AVX512,FUTURE
+VSUBPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5c /r ] AVX512,FUTURE
+VSUBPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5c /r ] AVX512VL,AVX512,FUTURE
+VSUBPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5c /r ] AVX512VL,AVX512,FUTURE
+VSUBPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5c /r ] AVX512,FUTURE
+VSUBSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.128.f2.0f.w1 5c /r ] AVX512,FUTURE
+VSUBSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.128.f3.0f.w0 5c /r ] AVX512,FUTURE
+VUCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.128.66.0f.w1 2e /r ] AVX512,FUTURE
+VUCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.128.0f.w0 2e /r ] AVX512,FUTURE
+VUNPCKHPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 15 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKHPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 15 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKHPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 15 /r ] AVX512,FUTURE
+VUNPCKHPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKHPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 15 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKHPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 15 /r ] AVX512,FUTURE
+VUNPCKLPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 14 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKLPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 14 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKLPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 14 /r ] AVX512,FUTURE
+VUNPCKLPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKLPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 14 /r ] AVX512VL,AVX512,FUTURE
+VUNPCKLPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 14 /r ] AVX512,FUTURE
+VXORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE
+VXORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE
+VXORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 57 /r ] AVX512DQ,FUTURE
+VXORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE
+VXORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE
+VXORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 57 /r ] AVX512DQ,FUTURE
+;# MJC PUBLIC END
+
+; Intel memory protection keys for userspace (PKU aka PKEYs)
+RDPKRU void [ 0f 01 ee] X64,FUTURE
+WRPKRU void [ 0f 01 ef] X64,FUTURE
+
+; Read Processor ID
+RDPID reg32 [m: f3 0f c7 /7] NOLONG,FUTURE
+RDPID reg64 [m: o64nw f3 0f c7 /7] X64,FUTURE
+RDPID reg32 [m: f3 0f c7 /7] X64,UNDOC,FUTURE
+
+; New memory instructions
+CLFLUSHOPT mem [m: 66 0f ae /7] FUTURE
+CLWB mem [m: 66 0f ae /6] FUTURE
+;# This one was killed before it saw the light of day
+PCOMMIT void [ 66 0f ae f8] FUTURE,UNDOC,OBSOLETE
+
+; AMD Zen v1
+CLZERO void [ 0f 01 fc] FUTURE,AMD
+
+;# Systematic names for the hinting nop instructions
+; These should be last in the file
+HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC
+HINT_NOP0 rm32 [m: o32 0f 18 /0] P6,UNDOC
+HINT_NOP0 rm64 [m: o64 0f 18 /0] X64,UNDOC
+HINT_NOP1 rm16 [m: o16 0f 18 /1] P6,UNDOC
+HINT_NOP1 rm32 [m: o32 0f 18 /1] P6,UNDOC
+HINT_NOP1 rm64 [m: o64 0f 18 /1] X64,UNDOC
+HINT_NOP2 rm16 [m: o16 0f 18 /2] P6,UNDOC
+HINT_NOP2 rm32 [m: o32 0f 18 /2] P6,UNDOC
+HINT_NOP2 rm64 [m: o64 0f 18 /2] X64,UNDOC
+HINT_NOP3 rm16 [m: o16 0f 18 /3] P6,UNDOC
+HINT_NOP3 rm32 [m: o32 0f 18 /3] P6,UNDOC
+HINT_NOP3 rm64 [m: o64 0f 18 /3] X64,UNDOC
+HINT_NOP4 rm16 [m: o16 0f 18 /4] P6,UNDOC
+HINT_NOP4 rm32 [m: o32 0f 18 /4] P6,UNDOC
+HINT_NOP4 rm64 [m: o64 0f 18 /4] X64,UNDOC
+HINT_NOP5 rm16 [m: o16 0f 18 /5] P6,UNDOC
+HINT_NOP5 rm32 [m: o32 0f 18 /5] P6,UNDOC
+HINT_NOP5 rm64 [m: o64 0f 18 /5] X64,UNDOC
+HINT_NOP6 rm16 [m: o16 0f 18 /6] P6,UNDOC
+HINT_NOP6 rm32 [m: o32 0f 18 /6] P6,UNDOC
+HINT_NOP6 rm64 [m: o64 0f 18 /6] X64,UNDOC
+HINT_NOP7 rm16 [m: o16 0f 18 /7] P6,UNDOC
+HINT_NOP7 rm32 [m: o32 0f 18 /7] P6,UNDOC
+HINT_NOP7 rm64 [m: o64 0f 18 /7] X64,UNDOC
+HINT_NOP8 rm16 [m: o16 0f 19 /0] P6,UNDOC
+HINT_NOP8 rm32 [m: o32 0f 19 /0] P6,UNDOC
+HINT_NOP8 rm64 [m: o64 0f 19 /0] X64,UNDOC
+HINT_NOP9 rm16 [m: o16 0f 19 /1] P6,UNDOC
+HINT_NOP9 rm32 [m: o32 0f 19 /1] P6,UNDOC
+HINT_NOP9 rm64 [m: o64 0f 19 /1] X64,UNDOC
+HINT_NOP10 rm16 [m: o16 0f 19 /2] P6,UNDOC
+HINT_NOP10 rm32 [m: o32 0f 19 /2] P6,UNDOC
+HINT_NOP10 rm64 [m: o64 0f 19 /2] X64,UNDOC
+HINT_NOP11 rm16 [m: o16 0f 19 /3] P6,UNDOC
+HINT_NOP11 rm32 [m: o32 0f 19 /3] P6,UNDOC
+HINT_NOP11 rm64 [m: o64 0f 19 /3] X64,UNDOC
+HINT_NOP12 rm16 [m: o16 0f 19 /4] P6,UNDOC
+HINT_NOP12 rm32 [m: o32 0f 19 /4] P6,UNDOC
+HINT_NOP12 rm64 [m: o64 0f 19 /4] X64,UNDOC
+HINT_NOP13 rm16 [m: o16 0f 19 /5] P6,UNDOC
+HINT_NOP13 rm32 [m: o32 0f 19 /5] P6,UNDOC
+HINT_NOP13 rm64 [m: o64 0f 19 /5] X64,UNDOC
+HINT_NOP14 rm16 [m: o16 0f 19 /6] P6,UNDOC
+HINT_NOP14 rm32 [m: o32 0f 19 /6] P6,UNDOC
+HINT_NOP14 rm64 [m: o64 0f 19 /6] X64,UNDOC
+HINT_NOP15 rm16 [m: o16 0f 19 /7] P6,UNDOC
+HINT_NOP15 rm32 [m: o32 0f 19 /7] P6,UNDOC
+HINT_NOP15 rm64 [m: o64 0f 19 /7] X64,UNDOC
+HINT_NOP16 rm16 [m: o16 0f 1a /0] P6,UNDOC
+HINT_NOP16 rm32 [m: o32 0f 1a /0] P6,UNDOC
+HINT_NOP16 rm64 [m: o64 0f 1a /0] X64,UNDOC
+HINT_NOP17 rm16 [m: o16 0f 1a /1] P6,UNDOC
+HINT_NOP17 rm32 [m: o32 0f 1a /1] P6,UNDOC
+HINT_NOP17 rm64 [m: o64 0f 1a /1] X64,UNDOC
+HINT_NOP18 rm16 [m: o16 0f 1a /2] P6,UNDOC
+HINT_NOP18 rm32 [m: o32 0f 1a /2] P6,UNDOC
+HINT_NOP18 rm64 [m: o64 0f 1a /2] X64,UNDOC
+HINT_NOP19 rm16 [m: o16 0f 1a /3] P6,UNDOC
+HINT_NOP19 rm32 [m: o32 0f 1a /3] P6,UNDOC
+HINT_NOP19 rm64 [m: o64 0f 1a /3] X64,UNDOC
+HINT_NOP20 rm16 [m: o16 0f 1a /4] P6,UNDOC
+HINT_NOP20 rm32 [m: o32 0f 1a /4] P6,UNDOC
+HINT_NOP20 rm64 [m: o64 0f 1a /4] X64,UNDOC
+HINT_NOP21 rm16 [m: o16 0f 1a /5] P6,UNDOC
+HINT_NOP21 rm32 [m: o32 0f 1a /5] P6,UNDOC
+HINT_NOP21 rm64 [m: o64 0f 1a /5] X64,UNDOC
+HINT_NOP22 rm16 [m: o16 0f 1a /6] P6,UNDOC
+HINT_NOP22 rm32 [m: o32 0f 1a /6] P6,UNDOC
+HINT_NOP22 rm64 [m: o64 0f 1a /6] X64,UNDOC
+HINT_NOP23 rm16 [m: o16 0f 1a /7] P6,UNDOC
+HINT_NOP23 rm32 [m: o32 0f 1a /7] P6,UNDOC
+HINT_NOP23 rm64 [m: o64 0f 1a /7] X64,UNDOC
+HINT_NOP24 rm16 [m: o16 0f 1b /0] P6,UNDOC
+HINT_NOP24 rm32 [m: o32 0f 1b /0] P6,UNDOC
+HINT_NOP24 rm64 [m: o64 0f 1b /0] X64,UNDOC
+HINT_NOP25 rm16 [m: o16 0f 1b /1] P6,UNDOC
+HINT_NOP25 rm32 [m: o32 0f 1b /1] P6,UNDOC
+HINT_NOP25 rm64 [m: o64 0f 1b /1] X64,UNDOC
+HINT_NOP26 rm16 [m: o16 0f 1b /2] P6,UNDOC
+HINT_NOP26 rm32 [m: o32 0f 1b /2] P6,UNDOC
+HINT_NOP26 rm64 [m: o64 0f 1b /2] X64,UNDOC
+HINT_NOP27 rm16 [m: o16 0f 1b /3] P6,UNDOC
+HINT_NOP27 rm32 [m: o32 0f 1b /3] P6,UNDOC
+HINT_NOP27 rm64 [m: o64 0f 1b /3] X64,UNDOC
+HINT_NOP28 rm16 [m: o16 0f 1b /4] P6,UNDOC
+HINT_NOP28 rm32 [m: o32 0f 1b /4] P6,UNDOC
+HINT_NOP28 rm64 [m: o64 0f 1b /4] X64,UNDOC
+HINT_NOP29 rm16 [m: o16 0f 1b /5] P6,UNDOC
+HINT_NOP29 rm32 [m: o32 0f 1b /5] P6,UNDOC
+HINT_NOP29 rm64 [m: o64 0f 1b /5] X64,UNDOC
+HINT_NOP30 rm16 [m: o16 0f 1b /6] P6,UNDOC
+HINT_NOP30 rm32 [m: o32 0f 1b /6] P6,UNDOC
+HINT_NOP30 rm64 [m: o64 0f 1b /6] X64,UNDOC
+HINT_NOP31 rm16 [m: o16 0f 1b /7] P6,UNDOC
+HINT_NOP31 rm32 [m: o32 0f 1b /7] P6,UNDOC
+HINT_NOP31 rm64 [m: o64 0f 1b /7] X64,UNDOC
+HINT_NOP32 rm16 [m: o16 0f 1c /0] P6,UNDOC
+HINT_NOP32 rm32 [m: o32 0f 1c /0] P6,UNDOC
+HINT_NOP32 rm64 [m: o64 0f 1c /0] X64,UNDOC
+HINT_NOP33 rm16 [m: o16 0f 1c /1] P6,UNDOC
+HINT_NOP33 rm32 [m: o32 0f 1c /1] P6,UNDOC
+HINT_NOP33 rm64 [m: o64 0f 1c /1] X64,UNDOC
+HINT_NOP34 rm16 [m: o16 0f 1c /2] P6,UNDOC
+HINT_NOP34 rm32 [m: o32 0f 1c /2] P6,UNDOC
+HINT_NOP34 rm64 [m: o64 0f 1c /2] X64,UNDOC
+HINT_NOP35 rm16 [m: o16 0f 1c /3] P6,UNDOC
+HINT_NOP35 rm32 [m: o32 0f 1c /3] P6,UNDOC
+HINT_NOP35 rm64 [m: o64 0f 1c /3] X64,UNDOC
+HINT_NOP36 rm16 [m: o16 0f 1c /4] P6,UNDOC
+HINT_NOP36 rm32 [m: o32 0f 1c /4] P6,UNDOC
+HINT_NOP36 rm64 [m: o64 0f 1c /4] X64,UNDOC
+HINT_NOP37 rm16 [m: o16 0f 1c /5] P6,UNDOC
+HINT_NOP37 rm32 [m: o32 0f 1c /5] P6,UNDOC
+HINT_NOP37 rm64 [m: o64 0f 1c /5] X64,UNDOC
+HINT_NOP38 rm16 [m: o16 0f 1c /6] P6,UNDOC
+HINT_NOP38 rm32 [m: o32 0f 1c /6] P6,UNDOC
+HINT_NOP38 rm64 [m: o64 0f 1c /6] X64,UNDOC
+HINT_NOP39 rm16 [m: o16 0f 1c /7] P6,UNDOC
+HINT_NOP39 rm32 [m: o32 0f 1c /7] P6,UNDOC
+HINT_NOP39 rm64 [m: o64 0f 1c /7] X64,UNDOC
+HINT_NOP40 rm16 [m: o16 0f 1d /0] P6,UNDOC
+HINT_NOP40 rm32 [m: o32 0f 1d /0] P6,UNDOC
+HINT_NOP40 rm64 [m: o64 0f 1d /0] X64,UNDOC
+HINT_NOP41 rm16 [m: o16 0f 1d /1] P6,UNDOC
+HINT_NOP41 rm32 [m: o32 0f 1d /1] P6,UNDOC
+HINT_NOP41 rm64 [m: o64 0f 1d /1] X64,UNDOC
+HINT_NOP42 rm16 [m: o16 0f 1d /2] P6,UNDOC
+HINT_NOP42 rm32 [m: o32 0f 1d /2] P6,UNDOC
+HINT_NOP42 rm64 [m: o64 0f 1d /2] X64,UNDOC
+HINT_NOP43 rm16 [m: o16 0f 1d /3] P6,UNDOC
+HINT_NOP43 rm32 [m: o32 0f 1d /3] P6,UNDOC
+HINT_NOP43 rm64 [m: o64 0f 1d /3] X64,UNDOC
+HINT_NOP44 rm16 [m: o16 0f 1d /4] P6,UNDOC
+HINT_NOP44 rm32 [m: o32 0f 1d /4] P6,UNDOC
+HINT_NOP44 rm64 [m: o64 0f 1d /4] X64,UNDOC
+HINT_NOP45 rm16 [m: o16 0f 1d /5] P6,UNDOC
+HINT_NOP45 rm32 [m: o32 0f 1d /5] P6,UNDOC
+HINT_NOP45 rm64 [m: o64 0f 1d /5] X64,UNDOC
+HINT_NOP46 rm16 [m: o16 0f 1d /6] P6,UNDOC
+HINT_NOP46 rm32 [m: o32 0f 1d /6] P6,UNDOC
+HINT_NOP46 rm64 [m: o64 0f 1d /6] X64,UNDOC
+HINT_NOP47 rm16 [m: o16 0f 1d /7] P6,UNDOC
+HINT_NOP47 rm32 [m: o32 0f 1d /7] P6,UNDOC
+HINT_NOP47 rm64 [m: o64 0f 1d /7] X64,UNDOC
+HINT_NOP48 rm16 [m: o16 0f 1e /0] P6,UNDOC
+HINT_NOP48 rm32 [m: o32 0f 1e /0] P6,UNDOC
+HINT_NOP48 rm64 [m: o64 0f 1e /0] X64,UNDOC
+HINT_NOP49 rm16 [m: o16 0f 1e /1] P6,UNDOC
+HINT_NOP49 rm32 [m: o32 0f 1e /1] P6,UNDOC
+HINT_NOP49 rm64 [m: o64 0f 1e /1] X64,UNDOC
+HINT_NOP50 rm16 [m: o16 0f 1e /2] P6,UNDOC
+HINT_NOP50 rm32 [m: o32 0f 1e /2] P6,UNDOC
+HINT_NOP50 rm64 [m: o64 0f 1e /2] X64,UNDOC
+HINT_NOP51 rm16 [m: o16 0f 1e /3] P6,UNDOC
+HINT_NOP51 rm32 [m: o32 0f 1e /3] P6,UNDOC
+HINT_NOP51 rm64 [m: o64 0f 1e /3] X64,UNDOC
+HINT_NOP52 rm16 [m: o16 0f 1e /4] P6,UNDOC
+HINT_NOP52 rm32 [m: o32 0f 1e /4] P6,UNDOC
+HINT_NOP52 rm64 [m: o64 0f 1e /4] X64,UNDOC
+HINT_NOP53 rm16 [m: o16 0f 1e /5] P6,UNDOC
+HINT_NOP53 rm32 [m: o32 0f 1e /5] P6,UNDOC
+HINT_NOP53 rm64 [m: o64 0f 1e /5] X64,UNDOC
+HINT_NOP54 rm16 [m: o16 0f 1e /6] P6,UNDOC
+HINT_NOP54 rm32 [m: o32 0f 1e /6] P6,UNDOC
+HINT_NOP54 rm64 [m: o64 0f 1e /6] X64,UNDOC
+HINT_NOP55 rm16 [m: o16 0f 1e /7] P6,UNDOC
+HINT_NOP55 rm32 [m: o32 0f 1e /7] P6,UNDOC
+HINT_NOP55 rm64 [m: o64 0f 1e /7] X64,UNDOC
+HINT_NOP56 rm16 [m: o16 0f 1f /0] P6,UNDOC
+HINT_NOP56 rm32 [m: o32 0f 1f /0] P6,UNDOC
+HINT_NOP56 rm64 [m: o64 0f 1f /0] X64,UNDOC
+HINT_NOP57 rm16 [m: o16 0f 1f /1] P6,UNDOC
+HINT_NOP57 rm32 [m: o32 0f 1f /1] P6,UNDOC
+HINT_NOP57 rm64 [m: o64 0f 1f /1] X64,UNDOC
+HINT_NOP58 rm16 [m: o16 0f 1f /2] P6,UNDOC
+HINT_NOP58 rm32 [m: o32 0f 1f /2] P6,UNDOC
+HINT_NOP58 rm64 [m: o64 0f 1f /2] X64,UNDOC
+HINT_NOP59 rm16 [m: o16 0f 1f /3] P6,UNDOC
+HINT_NOP59 rm32 [m: o32 0f 1f /3] P6,UNDOC
+HINT_NOP59 rm64 [m: o64 0f 1f /3] X64,UNDOC
+HINT_NOP60 rm16 [m: o16 0f 1f /4] P6,UNDOC
+HINT_NOP60 rm32 [m: o32 0f 1f /4] P6,UNDOC
+HINT_NOP60 rm64 [m: o64 0f 1f /4] X64,UNDOC
+HINT_NOP61 rm16 [m: o16 0f 1f /5] P6,UNDOC
+HINT_NOP61 rm32 [m: o32 0f 1f /5] P6,UNDOC
+HINT_NOP61 rm64 [m: o64 0f 1f /5] X64,UNDOC
+HINT_NOP62 rm16 [m: o16 0f 1f /6] P6,UNDOC
+HINT_NOP62 rm32 [m: o32 0f 1f /6] P6,UNDOC
+HINT_NOP62 rm64 [m: o64 0f 1f /6] X64,UNDOC
+HINT_NOP63 rm16 [m: o16 0f 1f /7] P6,UNDOC
+HINT_NOP63 rm32 [m: o32 0f 1f /7] P6,UNDOC
+HINT_NOP63 rm64 [m: o64 0f 1f /7] X64,UNDOC
diff --git a/main.myr b/main.myr
new file mode 100644
index 0000000..ca46868
--- /dev/null
+++ b/main.myr
@@ -0,0 +1,26 @@
+use std
+
+use "types"
+use "parse"
+use "emit"
+
+const main = {args
+ var cmd
+ var as : assem.assem#
+
+ cmd = std.optparse(args, &[
+ .argdesc="files...",
+ ])
+
+ for path in cmd.args
+ as = std.mk([
+ .bits = 64,
+ .syms = std.mkht(std.strhash, std.streq),
+ .defs = std.mkht(std.strhash, std.streq),
+ ])
+ assem.parse(as, path)
+ assem.ble(as)
+ std.htfree(as.syms)
+ std.free(as)
+ ;;
+}
diff --git a/parse.myr b/parse.myr
new file mode 100644
index 0000000..da562cd
--- /dev/null
+++ b/parse.myr
@@ -0,0 +1,303 @@
+use std
+
+use "types"
+use "encode"
+
+use "tables-gen"
+
+pkg assem =
+ const parse : (as : assem#, path : byte[:] -> void)
+;;
+
+type parser = struct
+ data : byte[:]
+ rest : byte[:]
+ fname : byte[:]
+ line : int
+;;
+
+
+const parse = {as, path
+ var data, p
+
+ match std.slurp(path)
+ | `std.Ok d: data = d
+ | `std.Err e: std.fatal("could not open {}: {}\n", path, e)
+ ;;
+
+ p = [
+ .data=data,
+ .rest=data,
+ .fname=path,
+ .line=1,
+ ]
+ parsef(&p, as)
+ std.slfree(p.data)
+}
+
+const parsef = {p, as
+ while true
+ eatspace(p)
+ if p.rest.len == 0
+ break
+ ;;
+ if peekc(p) == '\n' || peekc(p) == ';'
+ takec(p)
+ continue
+ ;;
+ match word(p)
+ | `std.Some ".def": def(p, as)
+ | `std.Some ".data": as.cursym = symbol(p, as, Pres|Read|Write)
+ | `std.Some ".rodata": as.cursym = symbol(p, as, Pres|Read|Write)
+ | `std.Some ".text": as.cursym = symbol(p, as, Pres|Read|Exec)
+ | `std.Some ".bss": as.cursym = symbol(p, as, Read|Write)
+ | `std.Some opname: insnlbl(p, as, opname)
+ | `std.None: err(p, "expected symbol definition, got {}\n", peekc(p))
+ ;;
+ ;;
+}
+
+/* .def name <constant> */
+const def = {p, as
+ var defname, defval
+
+ match word(p)
+ | `std.Some w: defname = w
+ | `std.None: err(p, "expected name after `.def`\n")
+ ;;
+
+ match word(p)
+ | `std.Some w: defval = w
+ | `std.None: err(p, "expected value after `.def {}`\n", defname)
+ ;;
+
+ std.htput(as.defs, std.sldup(defname), std.sldup(defval))
+}
+
+const symbol = {p, as, flg
+ var sym : sym#, name
+
+ match word(p)
+ | `std.Some s: name = s
+ | `std.None: err(p, "expected symbol name\n")
+ ;;
+
+ sym = std.mk([
+ .name=std.sldup(name),
+ .level=0,
+ .flags=flg,
+ .reloc=[][:],
+ .lbls=[][:],
+ ])
+
+ eatspace(p)
+ match peekc(p)
+ | '/': symattrs(p, sym)
+ | _:
+ ;;
+ eatspace(p)
+ expectnl(p)
+
+ std.htput(as.syms, sym.name, sym)
+ -> sym
+}
+
+const symattrs = {p, sym
+ takec(p) /* '/' */
+ while std.isalnum(peekc(p))
+ match takec(p)
+ | 'x': sym.level = std.max(sym.level, 2) /* exec level */
+ | 'l': sym.level = std.max(sym.level, 1) /* library level */
+ | 'd': sym.dedup = true /* deduplicate */
+ | flg: err(p, "unknown symbol flag '{}'\n", flg)
+ ;;
+ ;;
+}
+
+const insnlbl = {p, as, opname
+ var arglist : arg[8]
+ var al
+
+ if std.htcount(as.syms) == 0
+ std.fatal("insn {} outside of symbol\n", opname)
+ ;;
+
+ eatspace(p)
+ if peekc(p) == ':'
+ takec(p)
+ addlabel(as.cursym, opname)
+ else
+ al = args(p, as, opname, arglist[:])
+ encode(as, opname, al)
+ ;;
+
+ expectnl(p)
+}
+
+const args = {p, as, opname, arglist
+ var nargs
+ nargs = 0
+ while true
+ if nargs == arglist.len
+ err(p, "too many arguments for instruction {}\n", opname)
+ ;;
+
+ match arg(p)
+ | `std.Some a: arglist[nargs++] = a
+ | `std.None: err(p, "invalid for {}\n", opname)
+ ;;
+
+ eatspace(p)
+ match peekc(p)
+ | '\n': break
+ | ';': break
+ | ',': takec(p)
+ | chr: err(p, "junk character {} in arg list for {}\n", chr, opname)
+ ;;
+ ;;
+ -> arglist[:nargs]
+}
+
+const arg = {p
+ match peekc(p)
+ | '%': -> reg(p)
+ | '$': -> imm(p)
+ | c:
+ if !std.isalnum(c) && c != '('
+ err(p, "unknown operand for instruction near {}\n", c)
+ ;;
+ -> mem(p)
+ ;;
+}
+
+const imm = {p -> std.option(arg)
+ takec(p) /* '$' */
+ match word(p)
+ | `std.Some w: -> `std.Some `Imm (0, 32)
+ | `std.None: -> `std.None
+ ;;
+}
+
+const reg = {p
+ takec(p) /* % */
+ match word(p)
+ | `std.Some w: -> `std.Some `Reg (0, 32)
+ | `std.None: -> `std.None
+ ;;
+}
+
+const mem = {p
+ match word(p)
+ | `std.Some w: -> `std.Some `Mem (0, 32)
+ | `std.None: -> `std.None
+ ;;
+}
+
+const addlabel = {sym, lbl
+ //std.slpush(&sym.lbls, (std.sldup(lbl), sym.insn.len))
+}
+
+const word = {p
+ var c, n
+ var start
+
+ eatspace(p)
+ c = peekc(p)
+ n = 0
+ start = p.rest
+ while p.rest.len > 0
+ c = peekc(p)
+ if wordchar(c)
+ takec(p)
+ n += std.charlen(c)
+ else
+ break
+ ;;
+ ;;
+
+:done
+ if n > 0
+ -> `std.Some start[:n]
+ else
+ -> `std.None
+ ;;
+}
+
+const wordchar = {c
+ -> std.isalnum(c) || \
+ c == '.' || c == '_' || c == '$' || c == '-' || c == '+' || \
+ c == '%' || c == '&' || c == '@' || c == '!' || c == '~'
+}
+
+const eatspace = {p
+ var c
+
+ while p.rest.len > 0
+ c = peekc(p)
+ match c
+ | ' ': takec(p)
+ | '\t': takec(p)
+ | '\r': takec(p)
+ | '/':
+ if !eatcomment(p)
+ break
+ ;;
+
+ | _:
+ break
+ ;;
+ ;;
+}
+
+const eatcomment= {p
+ if std.hasprefix(p.rest, "//")
+ while p.rest.len > 0 && peekc(p) != '\n'
+ takec(p)
+ ;;
+ -> true
+ elif std.hasprefix(p.rest, "/*")
+ p.rest = p.rest[2:]
+ while p.rest.len > 1 && !std.hasprefix(p.rest, "*/")
+ takec(p)
+ ;;
+ if !std.hasprefix(p.rest, "*/")
+ err(p, "file ended within comment\n")
+ ;;
+ takec(p); takec(p);
+ -> true
+ ;;
+ -> false
+}
+
+const expectnl = {p
+ eatspace(p)
+ if p.rest.len == 0 || peekc(p) == '\n' || peekc(p) == ';'
+ takec(p)
+ -> true
+ ;;
+ -> false
+}
+
+const peekc = {p
+ -> std.decode(p.rest)
+}
+
+const takec = {p
+ var c, s
+
+ (c, s) = std.strstep(p.rest)
+ p.rest = s
+ -> c
+}
+
+$noret const err : (p : parser#, msg : byte[:], args : ... -> void) = {p, msg, args
+ var buf : byte[1024]
+ var ap
+ var sl
+
+ ap = std.vastart(&args)
+ sl = std.bfmtv(buf[:], msg, &ap)
+ std.fput(1, "{}:{}: {}", p.fname, p.line, sl)
+ std.exit(1)
+}
+
diff --git a/regs.dat b/regs.dat
new file mode 100644
index 0000000..723f6a4
--- /dev/null
+++ b/regs.dat
@@ -0,0 +1,138 @@
+## --------------------------------------------------------------------------
+##
+## Copyright 1996-2009 The NASM Authors - All Rights Reserved
+## See the file AUTHORS included with the NASM distribution for
+## the specific copyright holders.
+##
+## Redistribution and use in source and binary forms, with or without
+## modification, are permitted provided that the following
+## conditions are met:
+##
+## * Redistributions of source code must retain the above copyright
+## notice, this list of conditions and the following disclaimer.
+## * Redistributions in binary form must reproduce the above
+## copyright notice, this list of conditions and the following
+## disclaimer in the documentation and/or other materials provided
+## with the distribution.
+##
+## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+## DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+## CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+## NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+## LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+## EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+##
+## --------------------------------------------------------------------------
+
+#
+# List of registers and their classes; classes are defined in nasm.h
+#
+# The columns are:
+#
+# register name, assembler class, disassembler class(es), x86 register number[, token flag]
+#
+# If the register name ends in two numbers separated by a dash, then it is
+# repeated as many times as indicated, and the register number is
+# updated with it.
+#
+# If 'token flag' is present, this value will be assigned to tokflag field in
+# 'struct tokendata tokendata[]' table. Token flag can be used for specifying
+# special usage of corresponding register. E.g. opmask registers can be either
+# enclosed by curly braces or standalone operand depending on the usage.
+#
+
+# General-purpose registers
+al REG_AL reg8,reg8_rex 0
+ah REG_HIGH reg8 4
+ax REG_AX reg16 0
+eax REG_EAX reg32 0
+rax REG_RAX reg64 0
+bl REG8NA reg8,reg8_rex 3
+bh REG_HIGH reg8 7
+bx REG16NA reg16 3
+ebx REG32NA reg32 3
+rbx REG64NA reg64 3
+cl REG_CL reg8,reg8_rex 1
+ch REG_HIGH reg8 5
+cx REG_CX reg16 1
+ecx REG_ECX reg32 1
+rcx REG_RCX reg64 1
+dl REG_DL reg8,reg8_rex 2
+dh REG_HIGH reg8 6
+dx REG_DX reg16 2
+edx REG_EDX reg32 2
+rdx REG_RDX reg64 2
+spl REG8NA reg8_rex 4
+sp REG16NA reg16 4
+esp REG32NA reg32 4
+rsp REG64NA reg64 4
+bpl REG8NA reg8_rex 5
+bp REG16NA reg16 5
+ebp REG32NA reg32 5
+rbp REG64NA reg64 5
+sil REG8NA reg8_rex 6
+si REG16NA reg16 6
+esi REG32NA reg32 6
+rsi REG64NA reg64 6
+dil REG8NA reg8_rex 7
+di REG16NA reg16 7
+edi REG32NA reg32 7
+rdi REG64NA reg64 7
+r8-15b REG8NA reg8_rex 8
+r8-15w REG16NA reg16 8
+r8-15d REG32NA reg32 8
+r8-15 REG64NA reg64 8
+
+# Segment registers
+es REG_ES sreg 0
+cs REG_CS sreg 1
+ss REG_SS sreg 2
+ds REG_DS sreg 3
+fs REG_FS sreg 4
+gs REG_GS sreg 5
+segr6-7 REG_SEG67 sreg 6
+
+# Control registers
+cr0-15 REG_CREG creg 0
+
+# Debug registers
+dr0-15 REG_DREG dreg 0
+
+# Test registers
+tr0-7 REG_TREG treg 0
+
+# Floating-point registers
+st0 FPU0 fpureg 0
+st1-7 FPUREG fpureg 1
+
+# MMX registers
+mm0-7 MMXREG mmxreg 0
+
+# SSE registers
+xmm0 XMM0 xmmreg 0
+xmm1-15 XMM_L16 xmmreg 1
+xmm16-31 XMMREG xmmreg 16
+
+# AVX registers
+ymm0 YMM0 ymmreg 0
+ymm1-15 YMM_L16 ymmreg 1
+ymm16-31 YMMREG ymmreg 16
+
+# AVX512 registers
+zmm0 ZMM0 zmmreg 0
+zmm1-15 ZMM_L16 zmmreg 1
+zmm16-31 ZMMREG zmmreg 16
+
+# Opmask registers
+k0 OPMASK0 opmaskreg 0
+k1-7 OPMASKREG opmaskreg 1 TFLAG_BRC_OPT
+
+# Bounds registers
+bnd0-3 BNDREG bndreg 0
diff --git a/types.myr b/types.myr
new file mode 100644
index 0000000..aac3190
--- /dev/null
+++ b/types.myr
@@ -0,0 +1,103 @@
+use std
+
+use "regs-gen"
+
+pkg assem =
+ type assem = struct
+ /* parsed symbols */
+ bits : int
+ syms : std.htab(byte[:], sym#)#
+ defs : std.htab(byte[:], byte[:])#
+ cursym : sym#
+ ;;
+
+ type sym = struct
+ name : byte[:]
+ level : int
+ flags : symflag
+ dedup : bool
+ reloc : reloc[:]
+ lbls : (byte[:], std.size)[:]
+ ;;
+
+ type arg = union
+ `Nil
+ `Reg (int, int)
+ `Mem (int, int)
+ `Imm (uint64, int)
+ ;;
+
+ type reloc = struct
+ sym : byte[:]
+ off : std.size
+ len : std.size
+ add : std.size
+ ;;
+
+ type symflag = uint32
+ const Pres : symflag = 1 << 0
+ const Read : symflag = 1 << 1
+ const Write : symflag = 1 << 2
+ const Exec : symflag = 1 << 3
+
+ /* types for the generated tables */
+ const Bits16 : uint32 = 1 << 0
+ const Bits32 : uint32 = 1 << 1
+ const Bits64 : uint32 = 1 << 2
+
+ /* Argument types. Registers are in regs-gen */
+ const Argimm : uint32 = 1
+ const Argimm8 : uint32 = 2
+ const Argimm16 : uint32 = 3
+ const Argimm32 : uint32 = 4
+ const Argimm64 : uint32 = 5
+
+ const Argrm8 : uint32 = 11
+ const Argrm16 : uint32 = 12
+ const Argrm32 : uint32 = 13
+ const Argrm64 : uint32 = 14
+ const Argmmxrm : uint32 = 14
+ const Argxmmrm64 : uint32 = 14
+ const Argxmmrm128 : uint32 = 14
+ const Argymmrm256 : uint32 = 14
+
+ const Argmem : uint32 = 22
+ const Argmem8 : uint32 = 23
+ const Argmem16 : uint32 = 23
+ const Argmem32 : uint32 = 24
+ const Argmem64 : uint32 = 25
+ const Argmem80 : uint32 = 26
+ const Argmem128 : uint32 = 27
+ const Argmem256 : uint32 = 27
+ const Argmemoff : uint32 = 28
+
+ const Argsbyteword : uint32 = 29
+ const Argsbytedword : uint32 = 30
+ const Argsbyteword16 : uint32 = 31
+ const Argsbytedword16 : uint32 = 32
+ const Argsbyteword32 : uint32 = 33
+ const Argsbytedword32 : uint32 = 34
+ const Argsbyteword64 : uint32 = 35
+ const Argsbytedword64 : uint32 = 36
+
+ const Argreg32na : uint32 = 29
+ const Argreg64na : uint32 = 29
+
+ const Argflagnear : uint32 = 1<<16
+ const Argflagfar : uint32 = 1<<17
+ const Argflagcolon : uint32 = 1<<18
+ const Argflagto : uint32 = 1<<19
+ const Argflagshort : uint32 = 1<<20
+
+ type insn = struct
+ name : byte[:]
+ vlist : variant[:]
+ ;;
+
+ type variant = struct
+ bytes : byte[:]
+ flags : uint32
+ args : uint32[:]
+ ;;
+;;
+